From patchwork Fri Sep 8 14:36:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Pawlowski X-Patchwork-Id: 13377546 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C949EEE8010 for ; Fri, 8 Sep 2023 14:36:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239320AbjIHOgu (ORCPT ); Fri, 8 Sep 2023 10:36:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55464 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244049AbjIHOgu (ORCPT ); Fri, 8 Sep 2023 10:36:50 -0400 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.126]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 745C113E for ; Fri, 8 Sep 2023 07:36:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1694183805; x=1725719805; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=MArSl64YomHwnz6jDtRYY424herOX+e2EnL2pZ9mIgE=; b=fiXnt+0SXViRIVaML74i4QGMRvE3Z4XU1v3Tb7krhJ7xy+dGXKSuzTz2 2VRSwP2Oht5iQ4CnXracsPNPQPFEEJXGfrmJq8Jlc1VBFiq+MxMFGdC9+ s67L6wCWuigT6YDjIXtWgZ+2A3iBmkHchHRVXKgDpV7ZVFfBd7PjFubKv sUcSHFjLUILhVYTi8f0STztrTThN4URNR2hODVbhfon5JDaX0f44TyyNb lwCOhZAMRN83v4DuxX15O/SnJdZhXoJ5ZbtgGMBfNo+Uiq9QlmlDTiWol HwsnQ4LZKqYK2gYyAaEyAuRrasM7rd69tFHE4ahPTAW4BCt1xzV9If1yo w==; X-IronPort-AV: E=McAfee;i="6600,9927,10827"; a="362719557" X-IronPort-AV: E=Sophos;i="6.02,237,1688454000"; d="scan'208";a="362719557" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Sep 2023 07:36:45 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10827"; a="808037757" X-IronPort-AV: E=Sophos;i="6.02,237,1688454000"; d="scan'208";a="808037757" Received: from bartoszp-dev.igk.intel.com ([10.91.3.51]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Sep 2023 07:36:42 -0700 From: Bartosz Pawlowski To: linux-pci@vger.kernel.org, bhelgaas@google.com Cc: sheenamo@google.com, justai@google.com, andriy.shevchenko@intel.com, joel.a.gibson@intel.com, emil.s.tantilov@intel.com, gaurav.s.emmanuel@intel.com, mike.conover@intel.com, shaopeng.he@intel.com, anthony.l.nguyen@intel.com, pavan.kumar.linga@intel.com, Bartosz Pawlowski , Andy Shevchenko , Alexander Lobakin Subject: [PATCH v2 2/2] PCI: Disable ATS for specific Intel IPU E2000 devices Date: Fri, 8 Sep 2023 14:36:06 +0000 Message-ID: <20230908143606.685930-3-bartosz.pawlowski@intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230908143606.685930-1-bartosz.pawlowski@intel.com> References: <20230908143606.685930-1-bartosz.pawlowski@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org There is a HW issue in A and B steppings of Intel IPU E2000 that it expects wrong endianness in ATS invalidation message body. This problem can lead to outdated translations being returned as valid and finally cause system instability. In order to prevent such issues introduce quirk_intel_e2000_no_ats() function to disable ATS for vulnerable IPU E2000 devices. Signed-off-by: Bartosz Pawlowski Reviewed-by: Andy Shevchenko Reviewed-by: Alexander Lobakin --- drivers/pci/quirks.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index a900546d8d45..2d3e6aaa387c 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -5550,6 +5550,25 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x7347, quirk_amd_harvest_no_ats); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x734f, quirk_amd_harvest_no_ats); /* AMD Raven platform iGPU */ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x15d8, quirk_amd_harvest_no_ats); + +/* + * Intel IPU E2000 revisions before C0 implement incorrect endianness + * in ATS Invalidate Request message body. Disable ATS for those devices. + */ +static void quirk_intel_e2000_no_ats(struct pci_dev *pdev) +{ + if (pdev->revision < 0x20) + quirk_no_ats(pdev); +} +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x1451, quirk_intel_e2000_no_ats); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x1452, quirk_intel_e2000_no_ats); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x1453, quirk_intel_e2000_no_ats); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x1454, quirk_intel_e2000_no_ats); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x1455, quirk_intel_e2000_no_ats); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x1457, quirk_intel_e2000_no_ats); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x1459, quirk_intel_e2000_no_ats); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x145a, quirk_intel_e2000_no_ats); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x145c, quirk_intel_e2000_no_ats); #endif /* CONFIG_PCI_ATS */ /* Freescale PCIe doesn't support MSI in RC mode */