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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by DS3PEPF000099E1.mail.protection.outlook.com (10.167.17.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7159.9 via Frontend Transport; Sat, 30 Dec 2023 12:43:14 +0000 Received: from aiemdee.2.ozlabs.ru (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.34; Sat, 30 Dec 2023 06:43:12 -0600 From: Alexey Kardashevskiy To: Alexey Kardashevskiy CC: , =?utf-8?q?Martin_Mare=C5=A1?= , Jonathan Cameron Subject: [PATCH pciutils 1/2] lspci: Add TEE-IO extended capability bit Date: Sat, 30 Dec 2023 23:42:38 +1100 Message-ID: <20231230124239.310927-2-aik@amd.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231230124239.310927-1-aik@amd.com> References: <20231230124239.310927-1-aik@amd.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF000099E1:EE_|PH8PR12MB6722:EE_ X-MS-Office365-Filtering-Correlation-Id: c0026c67-9ba4-4137-df86-08dc0934e42b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Dec 2023 12:43:14.9860 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c0026c67-9ba4-4137-df86-08dc0934e42b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF000099E1.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR12MB6722 PCIe r6.1 defines "TEE-IO Supported" in the PCI Express Device Capabilities Register which indicates that the Function implements the TEE-IO functionality as described by the TEE Device Interface Security Protocol (TDISP). Signed-off-by: Alexey Kardashevskiy --- lib/header.h | 1 + ls-caps.c | 1 + 2 files changed, 2 insertions(+) diff --git a/lib/header.h b/lib/header.h index 58fe7df..47ee8a6 100644 --- a/lib/header.h +++ b/lib/header.h @@ -776,6 +776,7 @@ #define PCI_EXP_DEVCAP_PWR_VAL 0x3fc0000 /* Slot Power Limit Value */ #define PCI_EXP_DEVCAP_PWR_SCL 0xc000000 /* Slot Power Limit Scale */ #define PCI_EXP_DEVCAP_FLRESET 0x10000000 /* Function-Level Reset */ +#define PCI_EXP_DEVCAP_TEE_IO 0x40000000 /* TEE-IO Supported (TDISP) */ #define PCI_EXP_DEVCTL 0x8 /* Device Control */ #define PCI_EXP_DEVCTL_CERE 0x0001 /* Correctable Error Reporting En. */ #define PCI_EXP_DEVCTL_NFERE 0x0002 /* Non-Fatal Error Reporting Enable */ diff --git a/ls-caps.c b/ls-caps.c index 2c99812..65e92e6 100644 --- a/ls-caps.c +++ b/ls-caps.c @@ -717,6 +717,7 @@ static void cap_express_dev(struct device *d, int where, int type) printf(" SlotPowerLimit "); show_power_limit((t & PCI_EXP_DEVCAP_PWR_VAL) >> 18, (t & PCI_EXP_DEVCAP_PWR_SCL) >> 26); } + printf(" TEE-IO%c", FLAG(t, PCI_EXP_DEVCAP_TEE_IO)); printf("\n"); w = get_conf_word(d, where + PCI_EXP_DEVCTL);