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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?9o2aAqNX6KhpJQaUfY9DyILPY6rP?= =?utf-8?q?V5iiQALpmIjRwesx8WkfPyo3DYtWppx4pHwkZxZxymkHi/tYMp2BKOESFMEZRlt8n?= =?utf-8?q?huqajDcy2ESuKFlCtFNpjVHNn7gcOZWRZvyVAoTPHyKeZl9Qs5Reu6ZDuTHJP6Wu8?= =?utf-8?q?z+DPZFQ+tW2VEJKUuHNUQzIzZyal+uXpCkgwrGb8pnEhyuLbUsWC1YT3ydKflvGLB?= =?utf-8?q?Ht3kOR8DaSkWXJifC9oLBeNnN5VOM5tghUgstnGP6IsdJ5kdymel65UbsxWIYl3o4?= =?utf-8?q?W4/+apxWWqjhZQXLF79nBfGBv/XKIKbwSL5nVmBxIEpMj3l31hxjy6LFT5LBIIXHT?= =?utf-8?q?za+zeF7YX2WJLRtKwZSyqnu4hG6HNs/UjowweFx2xAtTyYwFZKBD5/rmQFH4PzB5P?= =?utf-8?q?mwPhnDoHmLwBTOZ2p7SZg3SRf4WeWmhLrONP8MBKhaPsvl5r9EjAU9Pk/OquyBn2Z?= =?utf-8?q?YGhHfiRYxHor6fKBcUCud2dvw6RDTNNjWKuyhwaqdiRXPU54Q8Qw1/Qaf1FdEdUv0?= =?utf-8?q?8WUmaSxWQFhNvNHbPHmfoNVAL2yM9Wa8kZPFxYH3MG+pjCCVnNZOuFWJYUYhts4lr?= =?utf-8?q?8fD5pVI0j9jxIBwghuDWKWcqRA+e0XcLGq2/SczOsZFaK9cuekOzVTSCRXA5gplIP?= =?utf-8?q?JNKSRxwEhyEIN84n9MUKRBgZdCbwY2LPiJpY/gUDTdcy41FpAgdrAsCxRiiNsgyIj?= =?utf-8?q?AJeWgH6Ro7nTe12xbNuNcUjhmXG881+u8b2LFtLA47iD3+spKhwpzzCV/DifF7QRM?= =?utf-8?q?EeE5ahwmmGA/JUxlwPbyxfURk+i7B6lZ62nzx0rozGOZxPr0ni2mpnOZntZWoJ/7q?= =?utf-8?q?IDjZ6zD9uXirmzz4RWzWcrtx0vPikGKJpcvBExj39F4hCLImKrm3T4Oi85ZctJsul?= =?utf-8?q?WXdA1xF1i5kpMAMhcZhtgtPBlKDTkPTYUReo7dEac6elOJGmj3I2dhlnJNmuvPmo3?= =?utf-8?q?wDcvfGd2UPHXSVCApevF1hXNMgb0L6e7rU9I7Wk6tccIaZRfPpt72+9gxyxRnKgPJ?= =?utf-8?q?qtAs4l90W0xlUkJcQCCYgzvlSbTE1LtDzRf2z2z6H79I/ZrMhSGYnJimB3eNZ9dtW?= =?utf-8?q?VGU9a1uGvFT/JCPhJIdn/Y7ejgNA/bX1JHb1ys6+OToGCEHoHWd+XdERcEOL6VISO?= =?utf-8?q?qE1MkyIMe18F3qfQSInIrE3JZAbW24kcnnCimqj5vEhzDOxocOBY12y4+c5g1n5Gq?= =?utf-8?q?5a6lR0Edn/G+QC9LlTDd9p0/wtpUmSbndV4G9PYdqBmTelhRYdSJKFHFYBcCKpuuN?= =?utf-8?q?e4PRGQ4xzRb2bM6DebG56XY+N3AwuruNVkR3f+9gNtSGczoojsnTMXn5r3f7LXAO2?= =?utf-8?q?SBjrY4HbiqRl3ea4WT335T8cq9+l50zwp7iwWjg6Hbw2IVK1/ByyzVKHZnqRjwsui?= =?utf-8?q?lu9atTk/e7lyE8nY53lHEYdcBQQikZMcZVKmeBaHwr5pab31WZ8q1ovWTmzPusEJx?= =?utf-8?q?5VtybAiRB+B6kj+x4t3oIFlCWGwtaU8UOXEnPYQk4h0+RqkBP4O8LpQLoCeYFgGCn?= =?utf-8?q?tgwbrTNZcwSP?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 32d440c3-e25a-4898-aeda-08dc21f601b7 X-MS-Exchange-CrossTenant-AuthSource: PAXPR04MB9642.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Jan 2024 00:46:05.5321 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: cCLUSoEvzbp5jd2rR+XZc90H4gwloETCb7YpocwdyKSpYwtnzNLP+oMxAN32oSrRHq2dCiNOWmrgDaI87VvgTg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB6877 From: Yoshihiro Shimoda Add "code" and "routing" into struct dw_pcie_ob_atu_cfg for triggering INTx IRQs by iATU in the PCIe endpoint mode in near the future. PCIE_ATU_INHIBIT_PAYLOAD is set to issue TLP type of Msg instead of MsgD. So, this implementation supports the data-less messages only for now. Signed-off-by: Yoshihiro Shimoda Reviewed-by: Serge Semin Reviewed-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-designware.c | 9 +++++++-- drivers/pci/controller/dwc/pcie-designware.h | 4 ++++ 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c index df2575ec5f44c..ba909fade9db1 100644 --- a/drivers/pci/controller/dwc/pcie-designware.c +++ b/drivers/pci/controller/dwc/pcie-designware.c @@ -499,7 +499,7 @@ int dw_pcie_prog_outbound_atu(struct dw_pcie *pci, dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_UPPER_TARGET, upper_32_bits(atu->pci_addr)); - val = atu->type | PCIE_ATU_FUNC_NUM(atu->func_no); + val = atu->type | atu->routing | PCIE_ATU_FUNC_NUM(atu->func_no); if (upper_32_bits(limit_addr) > upper_32_bits(cpu_addr) && dw_pcie_ver_is_ge(pci, 460A)) val |= PCIE_ATU_INCREASE_REGION_SIZE; @@ -507,7 +507,12 @@ int dw_pcie_prog_outbound_atu(struct dw_pcie *pci, val = dw_pcie_enable_ecrc(val); dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL1, val); - dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL2, PCIE_ATU_ENABLE); + val = PCIE_ATU_ENABLE; + if (atu->type == PCIE_ATU_TYPE_MSG) { + /* The data-less messages only for now */ + val |= PCIE_ATU_INHIBIT_PAYLOAD | atu->code; + } + dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL2, val); /* * Make sure ATU enable takes effect before any subsequent config diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index d21db82e586d5..703b50bc5e0f1 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -148,11 +148,13 @@ #define PCIE_ATU_TYPE_IO 0x2 #define PCIE_ATU_TYPE_CFG0 0x4 #define PCIE_ATU_TYPE_CFG1 0x5 +#define PCIE_ATU_TYPE_MSG 0x10 #define PCIE_ATU_TD BIT(8) #define PCIE_ATU_FUNC_NUM(pf) ((pf) << 20) #define PCIE_ATU_REGION_CTRL2 0x004 #define PCIE_ATU_ENABLE BIT(31) #define PCIE_ATU_BAR_MODE_ENABLE BIT(30) +#define PCIE_ATU_INHIBIT_PAYLOAD BIT(22) #define PCIE_ATU_FUNC_NUM_MATCH_EN BIT(19) #define PCIE_ATU_LOWER_BASE 0x008 #define PCIE_ATU_UPPER_BASE 0x00C @@ -303,6 +305,8 @@ struct dw_pcie_ob_atu_cfg { int index; int type; u8 func_no; + u8 code; + u8 routing; u64 cpu_addr; u64 pci_addr; u64 size;