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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?OPrJrdgg+K/ZjD4/Nnlejne5jAEK?= =?utf-8?q?8yAA12gcH1uk5aGe3CodNU+bXVc5aY4OrO92/Mt6aCyWVdtP7SBX1XkB01m1WweM8?= =?utf-8?q?P7Zsbhe1VIaquTHa8maB4tTIEIjwRqwRuG9n0gigJJt+S6EIOwX9u4CyI4/1QC0It?= =?utf-8?q?PqeKj+Ykg1h1mAZlVUqpvp/sIg7bIoPay1s3Ng37B2+v3RGv+MP9/zvfgaNQ7qQaq?= =?utf-8?q?mbCPl8EGgZ1K7ctEmEYOwfLfTpBFgE9ril+n5fgIHM5F8pcjd/h+vuSe5prTVU5xO?= =?utf-8?q?mRzpO9vNiwBjZQuBvOA+DI4z1G51/b6fZiPOtBhdCvoXltgHFqT3f8ayjLclbYFIS?= =?utf-8?q?kUc0KIKrvNrVKsPeil6nwMnkDGO3G8+9y7AKe9TI5Rr77VdNK+f327gNWmYaWDOO3?= =?utf-8?q?rc+lyTEzo0WintA64lDYaZqIlzsaQXXleQh8zyqlFbwjM6DyZRQNJ5SuR7x+fJlJE?= =?utf-8?q?mWvUD7ipP8/WOKUEdNA4dfLbBiAOOlBeeE0dwVC0dQ5Wy6rkKU0thBJMN7GR5Ylqy?= =?utf-8?q?kKXYXtqUDjYXO9TLmYXZQhXi681L9OKoZmMt+yoxiYaZlPb+2dwi84SEm/mUnTPP5?= =?utf-8?q?a46JP1L2ZNRsWu6vxR6TM3X66q7klce63Ik+NAACzeHcE+6TsNTgWN8j7t2xTaMqy?= =?utf-8?q?wQmc8D04xXh6mmtE+SZw6bidnXYkE5dRn+913d4YXkmRdXYkc8/RWhJxRO5PWy0y9?= =?utf-8?q?0V0tCXhVlFzvMNLC1OkNZ5nFj9Hn9dU4+fTwmNZfljbiEbJH7joIJe1NppebeNwVT?= =?utf-8?q?HONSOdCEsN9Djsr4y69KcYOkRvh752pau9QZo2R/m9Qs1D29kfs7CDB6pkEY0XiWf?= =?utf-8?q?jCR0CgtdAmO4YDKIx42Gzq3fbRzeJe/0A/85dTTynI+QAXbHMPT24D3tvwPei4VZU?= =?utf-8?q?9Xj7TDC/yw4OVnOVIKsYwqh1kDSgGGpYeGhWZ2i+nazB9lrE0/LA/25f16gxOxAGx?= =?utf-8?q?TRYh8agqo1wdb4+fLDxVq3z6c0sKDGsgWEC2/OUrsSREB21qyquOb/QQ/wrv5Cz4r?= =?utf-8?q?6ZDfF/l8Y3CtT9/TQp7jZ06Sfk42pWBK5PV1IpnhcK0M5brUUqGygQHin/Jjg3Y9i?= =?utf-8?q?erkzHcrDVg1ggk5LEKqTBfqFb4dqJnYG+fd/zywMUfMyeVU5By75+Yw1ONmWpAyJ4?= =?utf-8?q?i39gZOQ2f4k/VWGVrLQabu+yF9WsnLYbaggSHZpaAB05mpRYn7vo9Zk15CZsTePU0?= =?utf-8?q?l/MYtyQnnbBd21o4BmQKI1a16R1Ub0XsSxWb8fVcBJo517NWS/TQcjSG+kUmgtAys?= =?utf-8?q?rhxFMc7Hd+zv8+P2zblHwAC9Y+uDDKNND70uh1yD9sP7c1IjkZhFVmnflN8zl7pPW?= =?utf-8?q?12pUndYBMtgfrdnclQMuCW+EBkmk7TkXOwnvMKzH4rKEtIm6cMR3Y/pN5dTQxbkK/?= =?utf-8?q?GnZc9zUuCMfoS7W/kOPenOeyJ1eFWfqJbNbLkKPAfDcph2oSBtPU05fAvCdNcQY6a?= =?utf-8?q?m3sG4ySSfyUUFf13eiGWhei+9sQZtIJc7Byj45CdL6/OVHrnahiAKAONvc65CVhZR?= =?utf-8?q?neG5I3q6s8qD?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 7d2a9e28-091d-423d-ec52-08dc24014917 X-MS-Exchange-CrossTenant-AuthSource: PAXPR04MB9642.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Feb 2024 15:11:52.0459 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: sHscLF5276+jfbi0HjqrDTLSw8kpD1NDKQjMNdVuDMjczoNDPVSyh+rclyUoNh2lAJwB2pPRijRVAXO3s1iXsA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAXPR04MB8425 From: Yoshihiro Shimoda Add "code" and "routing" into struct dw_pcie_ob_atu_cfg for triggering INTx IRQs by iATU in the PCIe endpoint mode in near the future. PCIE_ATU_INHIBIT_PAYLOAD is set to issue TLP type of Msg instead of MsgD. So, this implementation supports the data-less messages only for now. Signed-off-by: Yoshihiro Shimoda Reviewed-by: Serge Semin Reviewed-by: Manivannan Sadhasivam Signed-off-by: Frank Li --- drivers/pci/controller/dwc/pcie-designware.c | 9 +++++++-- drivers/pci/controller/dwc/pcie-designware.h | 4 ++++ 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c index df2575ec5f44c..ba909fade9db1 100644 --- a/drivers/pci/controller/dwc/pcie-designware.c +++ b/drivers/pci/controller/dwc/pcie-designware.c @@ -499,7 +499,7 @@ int dw_pcie_prog_outbound_atu(struct dw_pcie *pci, dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_UPPER_TARGET, upper_32_bits(atu->pci_addr)); - val = atu->type | PCIE_ATU_FUNC_NUM(atu->func_no); + val = atu->type | atu->routing | PCIE_ATU_FUNC_NUM(atu->func_no); if (upper_32_bits(limit_addr) > upper_32_bits(cpu_addr) && dw_pcie_ver_is_ge(pci, 460A)) val |= PCIE_ATU_INCREASE_REGION_SIZE; @@ -507,7 +507,12 @@ int dw_pcie_prog_outbound_atu(struct dw_pcie *pci, val = dw_pcie_enable_ecrc(val); dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL1, val); - dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL2, PCIE_ATU_ENABLE); + val = PCIE_ATU_ENABLE; + if (atu->type == PCIE_ATU_TYPE_MSG) { + /* The data-less messages only for now */ + val |= PCIE_ATU_INHIBIT_PAYLOAD | atu->code; + } + dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL2, val); /* * Make sure ATU enable takes effect before any subsequent config diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index d21db82e586d5..703b50bc5e0f1 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -148,11 +148,13 @@ #define PCIE_ATU_TYPE_IO 0x2 #define PCIE_ATU_TYPE_CFG0 0x4 #define PCIE_ATU_TYPE_CFG1 0x5 +#define PCIE_ATU_TYPE_MSG 0x10 #define PCIE_ATU_TD BIT(8) #define PCIE_ATU_FUNC_NUM(pf) ((pf) << 20) #define PCIE_ATU_REGION_CTRL2 0x004 #define PCIE_ATU_ENABLE BIT(31) #define PCIE_ATU_BAR_MODE_ENABLE BIT(30) +#define PCIE_ATU_INHIBIT_PAYLOAD BIT(22) #define PCIE_ATU_FUNC_NUM_MATCH_EN BIT(19) #define PCIE_ATU_LOWER_BASE 0x008 #define PCIE_ATU_UPPER_BASE 0x00C @@ -303,6 +305,8 @@ struct dw_pcie_ob_atu_cfg { int index; int type; u8 func_no; + u8 code; + u8 routing; u64 cpu_addr; u64 pci_addr; u64 size;