From patchwork Mon May 27 16:14:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13675579 X-Patchwork-Delegate: bhelgaas@google.com Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9FBFA16078E; Mon, 27 May 2024 16:15:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.199 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716826506; cv=none; b=ajiB0L4U92AFVnT35+Lzeftr1Aclcd8OwSPfutVNKG2LaRMuSIsceO/qpBPa+gFwGkeRcO24axMv8bpEZnemkmSRS+u56JKQnin7bQIpwCdIWDFNeOYphEJwYHvOPyDfRBF44drWI0q5lgP5E1Q3cqHSiuXRXzAh49XAhflr7GI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716826506; c=relaxed/simple; bh=hAw7ZrH4qArosZb3h9cuJr1chXNE9U8thrKG8CX9MuU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=HhwBH+1GWkDrhiO3CxoVejoiNmmAQqk2+BectqjQ/l52808JxNwKINsr2naIRvVDQ5kStq8G3A164Z9AlZOMlPVDX7wA+xeIV9HY1XdSdP7LPE2rWHdsSTefY6sNOn9WsGmgFViiQFQzhZWDL2pUKXg6UvuFO+SMnhUzRG8ihFU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=pFkYcNiU; arc=none smtp.client-ip=217.70.183.199 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="pFkYcNiU" Received: by mail.gandi.net (Postfix) with ESMTPA id 4D9ECFF812; Mon, 27 May 2024 16:15:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1716826502; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=8S9HiRmD7ovcxff043VP95jHFoFGaOl6oxz7Gv5SNN4=; b=pFkYcNiUq3y/4YP7LiY9gtczT6m+41iaptEO7DywyrCqHENh/tAErsMFgPSmcHqWvdKuLz bJ/LNVBq5QBDDzZOhMO22/bEwf8kvqA7N3Tsx7XwRZw7J20cGs1UgugTBMYb+R0UjZTPyy yAHcT6sr0v6rkTLx5CXukbDnHEWhmZJ3nWK868twACWXKwBisuQzsy8+wVSeGdQOhnKstv 3GetjKWZCUiQ3RoTcUeHJgHuakL/AH/O4jTb4gxlrjM8rDmBuh5BDkbAC+hyclfbXAHmbg +3sXw57ZjX4sbs5wkJ1JQGPoB+FEtMtxqjO0gnHcFYOkH+4dUocmU7uc++H+Nw== From: Herve Codina To: Simon Horman , Sai Krishna Gajula , Herve Codina , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lee Jones , Arnd Bergmann , Horatiu Vultur , UNGLinuxDriver@microchip.com, Andrew Lunn , Heiner Kallweit , Russell King , Saravana Kannan , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , Alexandre Belloni Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni , =?utf-8?b?Q2zDqW1lbnQgTMOp?= =?utf-8?b?Z2Vy?= Subject: [PATCH v2 02/19] reset: mchp: sparx5: Remove dependencies and allow building as a module Date: Mon, 27 May 2024 18:14:29 +0200 Message-ID: <20240527161450.326615-3-herve.codina@bootlin.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240527161450.326615-1-herve.codina@bootlin.com> References: <20240527161450.326615-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com From: Clément Léger The sparx5 reset controller depends on the SPARX5 architecture or the LAN966x SoC. This reset controller can be used by the LAN966x PCI device and so it needs to be available on all architectures. Also the LAN966x PCI device driver can be built as a module and this reset controller driver has no reason to be a builtin driver in that case. Signed-off-by: Clément Léger Signed-off-by: Herve Codina --- drivers/reset/Kconfig | 3 +-- drivers/reset/reset-microchip-sparx5.c | 2 ++ 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 7112f5932609..fb9005e2f5b5 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -124,8 +124,7 @@ config RESET_LPC18XX This enables the reset controller driver for NXP LPC18xx/43xx SoCs. config RESET_MCHP_SPARX5 - bool "Microchip Sparx5 reset driver" - depends on ARCH_SPARX5 || SOC_LAN966 || COMPILE_TEST + tristate "Microchip Sparx5 reset driver" default y if SPARX5_SWITCH select MFD_SYSCON help diff --git a/drivers/reset/reset-microchip-sparx5.c b/drivers/reset/reset-microchip-sparx5.c index 636e85c388b0..69915c7b4941 100644 --- a/drivers/reset/reset-microchip-sparx5.c +++ b/drivers/reset/reset-microchip-sparx5.c @@ -158,6 +158,7 @@ static const struct of_device_id mchp_sparx5_reset_of_match[] = { }, { } }; +MODULE_DEVICE_TABLE(of, mchp_sparx5_reset_of_match); static struct platform_driver mchp_sparx5_reset_driver = { .probe = mchp_sparx5_reset_probe, @@ -180,3 +181,4 @@ postcore_initcall(mchp_sparx5_reset_init); MODULE_DESCRIPTION("Microchip Sparx5 switch reset driver"); MODULE_AUTHOR("Steen Hegelund "); +MODULE_LICENSE("GPL");