From patchwork Wed May 29 08:28:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 13678336 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C66AE1802D8; Wed, 29 May 2024 08:29:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716971374; cv=none; b=B/LgG7jgudwnHrOJNnQrdFyaAMsX7oG3++U69EihF3ff7sRe9xYh7ydDl3ofpmHbmf2dQaRZXnGcmPrSvmSvksx5agD37v9UMkCKZeX5x6t4sdApF6Y4w5kkyMHz7ug/hn/pMTaKyJXlCQvCVl1PaWhfTcr6LP+RRGbHkro1f7s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716971374; c=relaxed/simple; bh=DgDwrueIemNRUbe/G47rptzZcqdtSi36/c0CqD/3bpc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=k6rMUOckxAVoCSh4NRVQKz9u3qcsEjeMISgadJR+dBV38L8Tar5mA5GWWowNoO5zTQjVWyaNWvVGTzw72fsWommrYdaEgHMn5QUUWG72DIbTqhW8n3JJRC/8UsmpHqeCMaS0A6GYeuTAhC27K8H36f3pYDyiGuGXzIrb4SDiuJA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=lvPQdGTU; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="lvPQdGTU" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E9A56C2BD10; Wed, 29 May 2024 08:29:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1716971374; bh=DgDwrueIemNRUbe/G47rptzZcqdtSi36/c0CqD/3bpc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=lvPQdGTUaVlg1aqniVj6oGLXetp4BruksxRNlzdqZhWsTycgI43tlsgfYsWEJslbj uZb/1QwyF2o91i4ZfK7bU7qZmuUqSP9G9fjt2AQ25W49F50qhrApiVV82LNSllGKA7 0q3BEvK8qSNHaPPxmxClcCimaM3Ig9pm5pJL7P78Io/a1sCqW+I1zqp2t9rEhZ9KGl tvqBqG7jK8M4jO491Ev9C0mcz/NV9NCbjQVvSbgfqUJMXrr3NTlPac3yb0ydK2Ad41 OYBktfPb0/Ma77o7VwXNlZwj6GOOsYTv2cO17kCdyJ2lLQ1MRkErq7eQ/cYYtLxg4r ueNsvzrkbAH7w== From: Niklas Cassel Date: Wed, 29 May 2024 10:28:59 +0200 Subject: [PATCH v4 05/13] dt-bindings: PCI: rockchip-dw-pcie: Fix description of legacy irq Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240529-rockchip-pcie-ep-v1-v4-5-3dc00fe21a78@kernel.org> References: <20240529-rockchip-pcie-ep-v1-v4-0-3dc00fe21a78@kernel.org> In-Reply-To: <20240529-rockchip-pcie-ep-v1-v4-0-3dc00fe21a78@kernel.org> To: Jingoo Han , Manivannan Sadhasivam , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Niklas Cassel , Kishon Vijay Abraham I , Arnd Bergmann , Damien Le Moal , Jon Lin , Shawn Lin , Simon Xue Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1950; i=cassel@kernel.org; h=from:subject:message-id; bh=DgDwrueIemNRUbe/G47rptzZcqdtSi36/c0CqD/3bpc=; b=owGbwMvMwCV2MsVw8cxjvkWMp9WSGNLCnofyPD2dFfy2tyLyxpPX9s3lddundb7ydDrQ3WTWf KdI74Z7RykLgxgXg6yYIovvD5f9xd3uU44r3rGBmcPKBDKEgYtTACZS4sLwv9hs4aovpT8M32wW 2qrXJLHnv/TVVx7bZQ8dU0oqtZmr0crwV0Su3Vedx+1EWVbGS+UbP/a7GDWp3VE+mbY54ZaHptk 6dgA= X-Developer-Key: i=cassel@kernel.org; a=openpgp; fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA The descriptions of the combined interrupt signals (level1) mention all the lower interrupt signals (level2) for each combined interrupt, regardless if the lower (level2) signal is RC or EP specific. E.g. the description of "Combined system interrupt" includes rbar_update, which is EP specific, and the description of "Combined message interrupt" includes obff_idle, obff_obff, obff_cpu_active, which are all EP specific. The only exception is the "Combined legacy interrupt", which for some reason does not provide an exhaustive list of the lower (level2) signals. Add the missing lower interrupt signals: tx_inta, tx_intb, tx_intc, and tx_intd for the "Combined legacy interrupt", as per the rk3568 and rk3588 Technical Reference Manuals, such that the descriptions of the combined interrupt signals are consistent. Signed-off-by: Niklas Cassel Reviewed-by: Rob Herring (Arm) Reviewed-by: Manivannan Sadhasivam --- Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml index 60d190a77580..ec5e6a3d048e 100644 --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml @@ -56,7 +56,8 @@ properties: pm_pme, pm_to_ack, pm_turnoff, obff_idle, obff_obff, obff_cpu_active - description: Combined legacy interrupt, which is used to signal the following - interrupts - inta, intb, intc, intd + interrupts - inta, intb, intc, intd, tx_inta, tx_intb, tx_intc, + tx_intd - description: Combined error interrupt, which is used to signal the following interrupts - aer_rc_err, aer_rc_err_msi, rx_cpl_timeout,