From patchwork Wed Jul 3 18:02:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jim Quinlan X-Patchwork-Id: 13722654 X-Patchwork-Delegate: kw@linux.com Received: from mail-qk1-f171.google.com (mail-qk1-f171.google.com [209.85.222.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C203B194AC2 for ; Wed, 3 Jul 2024 18:03:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.222.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1720029808; cv=none; b=DkoPY/0mcBdhTi3SdXy0sB5se7nEe9JVDbHQC2A904XPWAV3K9RlzwapCcFmsrbvgjNCgu+nB98Izn7+p5GS6Lcs2PgnyFNcZ8LcUTJnj62KdHZG9hw8f129FF4Wmroc1RZUd/stbEJEXoEEE2dYrTWZukKEcJI57IrR8L3fdnM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1720029808; c=relaxed/simple; bh=5lKGYPNuxA5W8bGwBXnOGNJfYFJaw3+60u9mClI2JXI=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: Content-Type; b=rBIMQ452xVVO2r5BTqXm+x8hhvXXEOgUVtFZp9BYmGPIFehQH2v9JIiQ6Jc7WuCbLzMiBoXkLp7sqdg92dlqpSqMHsApnLdu1qvRVrzGidt9LwfUq1IZcYMl+Qj55DntI4YZ9F2AZuNoKT89koypxtJG/2etCFG+fRnH5qAumjc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=broadcom.com; spf=fail smtp.mailfrom=broadcom.com; dkim=pass (1024-bit key) header.d=broadcom.com header.i=@broadcom.com header.b=eeuDDMV3; arc=none smtp.client-ip=209.85.222.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=broadcom.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=broadcom.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=broadcom.com header.i=@broadcom.com header.b="eeuDDMV3" Received: by mail-qk1-f171.google.com with SMTP id af79cd13be357-79c2c05638cso439150385a.3 for ; Wed, 03 Jul 2024 11:03:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1720029805; x=1720634605; darn=vger.kernel.org; h=references:in-reply-to:message-id:date:subject:cc:to:from:from:to :cc:subject:date:message-id:reply-to; bh=Miff4ecyPjbLQFyuz/vWqleqQqWNhli2DL5hrreK03U=; b=eeuDDMV3lAGITUNDrDy7lbi4J8vxqtwjr+Q1R/xgTUN7SK2bE0e+a/3mPjw26RhZAU /AFE4WYMpAOLO5GJsjFvxwEbRaaX3I7uVOW8Ex8N7mvL2dDBrGslOloTJZVDT+nageOM Ot7KY2XkSwiIfazNfhQjunojZC5Dop1rtsjZ8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1720029805; x=1720634605; h=references:in-reply-to:message-id:date:subject:cc:to:from :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=Miff4ecyPjbLQFyuz/vWqleqQqWNhli2DL5hrreK03U=; b=LaYYqGGTTVIb+dlOuJeNtQ5XHFvAWHhmQ+D+OvDpElEMbl2G4TYE/oLVqNIBbiDocv 9byNDEfJdwhdRGR8BUVV45V15TAMYG/MVMEXacE4QtUbeDztWeRHwWV4bye4ah2g1Vvu aXENYsDmgTmUhkDoBL8GuJS/0Zva0sXCWaCj6VX4hmE1Wef8MAeGStEUz0f0d42mjJ4K V6oUOftONtcka2Wyb2xQytf9MC6uuPWreD8dec776p2ogrPQfrNusi8kq2Txa1AyReZU jphALMjLqQyw5ZRv/5v2znJQ8tLjfOC+5D2DyJWoDbfam+w5Rb1C23nFHPOE4Wa4V5wx KA1Q== X-Gm-Message-State: AOJu0YwFrjIWQPZ9TYF8yVo1LraHMFcpI7Dw5JEDIWmVVwRr+MXsOj7y VuZqCB0AB2KtEpjU8FvmoD6Zmn5fcHmW7/MdsnpADSFBptJ6SwOAH+17eze9hKF4hA6Zfjgrj3M RNbGb1JpAGjx/S+o5PUZqwJJV6OKPBm5BTmtZToMKgZL2oc0B/kY+SAWJQMZGIl6NYGGmGNcSWB /WEhhVtkeP/BpnkTXjGtaad+mgFvqz0CBtwSaeLaIE/Utnt3FH X-Google-Smtp-Source: AGHT+IGcbdJR+kzkdQp9fuEs8Cq6Zz4UO5FZzDqjOmP16+1i6U0Wl0eZOq4U9Ekv/GBRdayvDQKkOg== X-Received: by 2002:a05:6214:ac7:b0:6b5:dcda:bae5 with SMTP id 6a1803df08f44-6b5dcdac1b6mr59876456d6.25.1720029804433; Wed, 03 Jul 2024 11:03:24 -0700 (PDT) Received: from stbsrv-and-01.and.broadcom.net ([192.19.144.250]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-6b59e5f1a6dsm55589626d6.83.2024.07.03.11.03.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jul 2024 11:03:23 -0700 (PDT) From: Jim Quinlan To: linux-pci@vger.kernel.org, Nicolas Saenz Julienne , Bjorn Helgaas , Lorenzo Pieralisi , Cyril Brulebois , Stanimir Varbanov , bcm-kernel-feedback-list@broadcom.com, jim2101024@gmail.com, james.quinlan@broadcom.com Cc: Florian Fainelli , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 11/12] PCI: brcmstb: Enable 7712 SOCs Date: Wed, 3 Jul 2024 14:02:55 -0400 Message-Id: <20240703180300.42959-12-james.quinlan@broadcom.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240703180300.42959-1-james.quinlan@broadcom.com> References: <20240703180300.42959-1-james.quinlan@broadcom.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: The Broadcom STB 7712 is the sibling chip of the RPi 5 (2712). Signed-off-by: Jim Quinlan Reviewed-by: Stanimir Varbanov --- drivers/pci/controller/pcie-brcmstb.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c index 1c3ce0c182d1..39d7dea282ff 100644 --- a/drivers/pci/controller/pcie-brcmstb.c +++ b/drivers/pci/controller/pcie-brcmstb.c @@ -1216,7 +1216,9 @@ static void brcm_config_clkreq(struct brcm_pcie *pcie) * atypical and should happen only with older devices. */ clkreq_cntl |= PCIE_MISC_HARD_PCIE_HARD_DEBUG_L1SS_ENABLE_MASK; - brcm_extend_rbus_timeout(pcie); + /* 7712 does not have this (RGR1) timer */ + if (pcie->type != BCM7712) + brcm_extend_rbus_timeout(pcie); } else { /* @@ -1628,6 +1630,13 @@ static const int pcie_offsets_bmips_7425[] = { [PCIE_INTR2_CPU_BASE] = 0x4300, }; +static const int pcie_offset_bcm7712[] = { + [EXT_CFG_INDEX] = 0x9000, + [EXT_CFG_DATA] = 0x9004, + [PCIE_HARD_DEBUG] = 0x4304, + [PCIE_INTR2_CPU_BASE] = 0x4400, +}; + static const struct pcie_cfg_data generic_cfg = { .offsets = pcie_offsets, .type = GENERIC, @@ -1686,6 +1695,13 @@ static const struct pcie_cfg_data bcm7216_cfg = { .has_phy = true, }; +static const struct pcie_cfg_data bcm7712_cfg = { + .offsets = pcie_offset_bcm7712, + .perst_set = brcm_pcie_perst_set_7278, + .bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_generic, + .type = BCM7712, +}; + static const struct of_device_id brcm_pcie_match[] = { { .compatible = "brcm,bcm2711-pcie", .data = &bcm2711_cfg }, { .compatible = "brcm,bcm4908-pcie", .data = &bcm4908_cfg }, @@ -1695,6 +1711,7 @@ static const struct of_device_id brcm_pcie_match[] = { { .compatible = "brcm,bcm7445-pcie", .data = &generic_cfg }, { .compatible = "brcm,bcm7435-pcie", .data = &bcm7435_cfg }, { .compatible = "brcm,bcm7425-pcie", .data = &bcm7425_cfg }, + { .compatible = "brcm,bcm7712-pcie", .data = &bcm7712_cfg }, {}, };