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Wed, 03 Jul 2024 11:03:05 -0700 (PDT) Received: from stbsrv-and-01.and.broadcom.net ([192.19.144.250]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-6b59e5f1a6dsm55589626d6.83.2024.07.03.11.03.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jul 2024 11:03:05 -0700 (PDT) From: Jim Quinlan To: linux-pci@vger.kernel.org, Nicolas Saenz Julienne , Bjorn Helgaas , Lorenzo Pieralisi , Cyril Brulebois , Stanimir Varbanov , bcm-kernel-feedback-list@broadcom.com, jim2101024@gmail.com, james.quinlan@broadcom.com Cc: Florian Fainelli , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 01/12] dt-bindings: PCI: Add Broadcom STB 7712 SOC, update maintainer Date: Wed, 3 Jul 2024 14:02:45 -0400 Message-Id: <20240703180300.42959-2-james.quinlan@broadcom.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240703180300.42959-1-james.quinlan@broadcom.com> References: <20240703180300.42959-1-james.quinlan@broadcom.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: - Update maintainer; Nicolas hasn't been active and it makes more sense to have a Broadcom maintainer - Add a driver compatible string for the new STB SOC 7712 - Add two new resets for the 7712: "bridge", for the the bridge between the PCIe core and the memory bus; "swinit", the PCIe core reset. - Order the compatible strings alphabetically - Restructure the reset controllers so that the definitions appear first before any rules that govern them. Signed-off-by: Jim Quinlan --- .../bindings/pci/brcm,stb-pcie.yaml | 44 +++++++++++++++---- 1 file changed, 36 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml index 11f8ea33240c..a070f35d28d7 100644 --- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Brcmstb PCIe Host Controller maintainers: - - Nicolas Saenz Julienne + - Jim Quinlan properties: compatible: @@ -16,11 +16,12 @@ properties: - brcm,bcm2711-pcie # The Raspberry Pi 4 - brcm,bcm4908-pcie - brcm,bcm7211-pcie # Broadcom STB version of RPi4 - - brcm,bcm7278-pcie # Broadcom 7278 Arm - brcm,bcm7216-pcie # Broadcom 7216 Arm - - brcm,bcm7445-pcie # Broadcom 7445 Arm + - brcm,bcm7278-pcie # Broadcom 7278 Arm - brcm,bcm7425-pcie # Broadcom 7425 MIPs - brcm,bcm7435-pcie # Broadcom 7435 MIPs + - brcm,bcm7445-pcie # Broadcom 7445 Arm + - brcm,bcm7712-pcie # STB sibling SOC of Raspberry Pi 5 reg: maxItems: 1 @@ -95,6 +96,20 @@ properties: minItems: 1 maxItems: 3 + resets: + items: + - description: reset for phy calibration + - description: reset for PCIe/CPU bus bridge + - description: reset for soft PCIe core reset + - description: reset for PERST# PCIe signal + + reset-names: + items: + - const: rescal + - const: bridge + - const: swinit + - const: perst + required: - compatible - reg @@ -118,13 +133,10 @@ allOf: then: properties: resets: - items: - - description: reset controller handling the PERST# signal - + minItems: 1 reset-names: items: - const: perst - required: - resets - reset-names @@ -136,12 +148,28 @@ allOf: then: properties: resets: + minItems: 1 + reset-names: items: - - description: phandle pointing to the RESCAL reset controller + - const: rescal + required: + - resets + - reset-names + - if: + properties: + compatible: + contains: + const: brcm,bcm7712-pcie + then: + properties: + resets: + minItems: 3 reset-names: items: - const: rescal + - const: bridge + - const: swinit required: - resets