From patchwork Thu Aug 8 15:46:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13757781 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2A703B674; Thu, 8 Aug 2024 15:47:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723132063; cv=none; b=ZijY91ARS/JV0Ed5Cj2godPfTFdfFlmgZDcT0IG1jBklt2ePSoAneeG0lZ7w79xTMoOHcD+WNRAyUJkEasiqrnTIfC3XxHWtwtNWR85bpwF+PjB+Y1sn84x28pVRgkFzJlvtJ0ZsxK6gX5dAG2qRKSRXohUTJdzwcJXlqKQVXIs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723132063; c=relaxed/simple; bh=sQ3ShZFkkgQHnuh/IzdrpCVIWvBsVNhLZ2Kvgr4DUeo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Pn+IWr6PZ7wWbpe8mSSDHt2wRnNTBHjOksXk/BY1BrEbkhJsXDntMunS3/XNmI31t5FHyU02Pgc/Nhqdf0yEb6cC6BVgQ4jZDfhMixO4oV2XEPmn0mabC+pYpfJRnTdVqedT3UhzfWmJ8kc563x0rRex0x60orDioCf83kShilw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=WaWRd+wn; arc=none smtp.client-ip=217.70.183.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="WaWRd+wn" Received: by mail.gandi.net (Postfix) with ESMTPA id C17DF20003; Thu, 8 Aug 2024 15:47:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1723132059; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=8ACceKOwc3+yeDfFXzYb3LStdUaRaLm6B5M3/2RUDpc=; b=WaWRd+wnYjAImwsKkez9X9Dvqt8hoTIYIf3jrNsm34PXPo+3EpCA4dgy2ezb/nZHaaX83x m88PkFbNiAaszRgepeBV1Awztv3xmpg9h4MYRplyglLqUb+JMLC40/yPw/cgX1o4zTAX1J nNAkrG8JKWXqDcw5b72mWXSlFxppjq98DQAKq8cfH0Og6Q9mwKwmyx1GCouJ0qdNC1ph+X 9Xg1oEPvahaXT7Sk5hsfWXolCttEn2rn0SiVG13NxVtgAKvWkhE2iQQKyFLYLI4LyGwzQk jBAko68dBfVf9EdYOEJCk7GJZtARU1aTLhI35MG4jSXIgRbkuLZjmPjZUC6HFw== From: Herve Codina To: Geert Uytterhoeven , Andy Shevchenko , Simon Horman , Lee Jones , Arnd Bergmann , Derek Kiernan , Dragan Cvetic , Greg Kroah-Hartman , Herve Codina , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Rob Herring , Saravana Kannan Cc: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Horatiu Vultur , Andrew Lunn , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni , =?utf-8?b?Q2zDqW1lbnQgTMOp?= =?utf-8?b?Z2Vy?= Subject: [PATCH v5 5/8] reset: mchp: sparx5: Allow building as a module Date: Thu, 8 Aug 2024 17:46:54 +0200 Message-ID: <20240808154658.247873-6-herve.codina@bootlin.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240808154658.247873-1-herve.codina@bootlin.com> References: <20240808154658.247873-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com From: Clément Léger This reset controller can be used by the LAN966x PCI device. The LAN966x PCI device driver can be built as a module and this reset controller driver has no reason to be a builtin driver in that case. Signed-off-by: Clément Léger Signed-off-by: Herve Codina Reviewed-by: Steen Hegelund --- drivers/reset/Kconfig | 2 +- drivers/reset/reset-microchip-sparx5.c | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 5b5a4d99616e..88350aa8a51c 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -133,7 +133,7 @@ config RESET_LPC18XX This enables the reset controller driver for NXP LPC18xx/43xx SoCs. config RESET_MCHP_SPARX5 - bool "Microchip Sparx5 reset driver" + tristate "Microchip Sparx5 reset driver" depends on ARCH_SPARX5 || SOC_LAN966 || MCHP_LAN966X_PCI || COMPILE_TEST default y if SPARX5_SWITCH select MFD_SYSCON diff --git a/drivers/reset/reset-microchip-sparx5.c b/drivers/reset/reset-microchip-sparx5.c index 636e85c388b0..69915c7b4941 100644 --- a/drivers/reset/reset-microchip-sparx5.c +++ b/drivers/reset/reset-microchip-sparx5.c @@ -158,6 +158,7 @@ static const struct of_device_id mchp_sparx5_reset_of_match[] = { }, { } }; +MODULE_DEVICE_TABLE(of, mchp_sparx5_reset_of_match); static struct platform_driver mchp_sparx5_reset_driver = { .probe = mchp_sparx5_reset_probe, @@ -180,3 +181,4 @@ postcore_initcall(mchp_sparx5_reset_init); MODULE_DESCRIPTION("Microchip Sparx5 switch reset driver"); MODULE_AUTHOR("Steen Hegelund "); +MODULE_LICENSE("GPL");