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AJvYcCWwICcwi2R+QVT9XG9AsGimRfeOxcj8QdKmJCAX0ot1z3o15nXgpIXemTaJ2prjaslfcF+ZxqoNMfs34n8=@vger.kernel.org, AJvYcCXqe3qiRuC982bo+Ia+7aX+uVDsr3z+IIOOFFnXzY/aQq2eAu22/vT9dntzRsNvMXNqNoqQbiwMctSL@vger.kernel.org X-Gm-Message-State: AOJu0YxRWd++GJQpa7JWb3ripdhqqR9AK69jbV/uWXeT9PA/Xpaw3kBF +uiPG6qQ4atHzIKFWAGaOr7RB2CzzCUCcJCdfiTuN6XgM9++DQQL X-Google-Smtp-Source: AGHT+IFDgqjSW1rL9/PXo6YlVWAy0MyWhSsve1VDtotr74xSvztHnzFkJDyDmzxaqwHh3b/9TiVGQw== X-Received: by 2002:a05:6a21:78c:b0:1cc:eba0:e7dc with SMTP id adf61e73a8af0-1ced053bc3bmr5198514637.34.1725215639483; Sun, 01 Sep 2024 11:33:59 -0700 (PDT) Received: from localhost.localdomain ([113.30.217.222]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-20559b793f8sm16262405ad.15.2024.09.01.11.33.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Sep 2024 11:33:59 -0700 (PDT) From: Anand Moon To: Shawn Lin , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Heiko Stuebner Cc: Anand Moon , linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 3/6] PCI: rockchip: Refactor rockchip_pcie_disable_clocks function signature Date: Mon, 2 Sep 2024 00:02:10 +0530 Message-ID: <20240901183221.240361-4-linux.amoon@gmail.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240901183221.240361-1-linux.amoon@gmail.com> References: <20240901183221.240361-1-linux.amoon@gmail.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Refactor the rockchip_pcie_disable_clocks function to accept a struct rockchip_pcie pointer instead of a void pointer. This change improves type safety and code readability by explicitly specifying the expected data type. Reviewed-by: Manivannan Sadhasivam Signed-off-by: Anand Moon --- v5: Fix the commit message and add r-b Manivannan. v4: None v3: None v2: None --- drivers/pci/controller/pcie-rockchip.c | 3 +-- drivers/pci/controller/pcie-rockchip.h | 2 +- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/pcie-rockchip.c b/drivers/pci/controller/pcie-rockchip.c index 87daa3288a01..b528d561b2de 100644 --- a/drivers/pci/controller/pcie-rockchip.c +++ b/drivers/pci/controller/pcie-rockchip.c @@ -269,9 +269,8 @@ int rockchip_pcie_enable_clocks(struct rockchip_pcie *rockchip) } EXPORT_SYMBOL_GPL(rockchip_pcie_enable_clocks); -void rockchip_pcie_disable_clocks(void *data) +void rockchip_pcie_disable_clocks(struct rockchip_pcie *rockchip) { - struct rockchip_pcie *rockchip = data; clk_bulk_disable_unprepare(rockchip->num_clks, rockchip->clks); } diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h index 2761699f670b..7f0f938e9195 100644 --- a/drivers/pci/controller/pcie-rockchip.h +++ b/drivers/pci/controller/pcie-rockchip.h @@ -347,7 +347,7 @@ int rockchip_pcie_init_port(struct rockchip_pcie *rockchip); int rockchip_pcie_get_phys(struct rockchip_pcie *rockchip); void rockchip_pcie_deinit_phys(struct rockchip_pcie *rockchip); int rockchip_pcie_enable_clocks(struct rockchip_pcie *rockchip); -void rockchip_pcie_disable_clocks(void *data); +void rockchip_pcie_disable_clocks(struct rockchip_pcie *rockchip); void rockchip_pcie_cfg_configuration_accesses( struct rockchip_pcie *rockchip, u32 type);