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AJvYcCXW+oSvwxDEfvfs0fmnx2OMqO8ed8DiL7dArK2iw3JMQgPafn1ssPBPWs29X7F3N18EqZsm361pYXol@vger.kernel.org, AJvYcCXgEswEtJiHrx2p4gDCsDnqpZ+YrtAJr99JB5iExvEExoGKtZDlYMG5clN18AvOQm85h75wtzgOKfxBbx0=@vger.kernel.org X-Gm-Message-State: AOJu0Yx0tsQcXBTNn5FkAPXEwsUpmjaavHfT+iVyVmQG6r9NFAHME9bP 9rsUfOZ+dmzIOvinUUYLqIWSqBtv2jAGdSDzPB/WZfAo26iQHt9Z X-Google-Smtp-Source: AGHT+IEUPGagVMOC9KCLecIWnezdM5vWHBTxQuVtaECFWLCdoXEIbPVt9GIICdlpAXiKjEaDRjzGCA== X-Received: by 2002:a05:6a20:2d22:b0:1cf:4fd9:61db with SMTP id adf61e73a8af0-1d8bcef1217mr20431553637.8.1728913964134; Mon, 14 Oct 2024 06:52:44 -0700 (PDT) Received: from localhost.localdomain ([113.30.217.221]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-20c8c0e74d6sm66469135ad.166.2024.10.14.06.52.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Oct 2024 06:52:43 -0700 (PDT) From: Anand Moon To: Shawn Lin , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Heiko Stuebner , Philipp Zabel , linux-pci@vger.kernel.org (open list:PCIE DRIVER FOR ROCKCHIP), linux-rockchip@lists.infradead.org (open list:PCIE DRIVER FOR ROCKCHIP), linux-arm-kernel@lists.infradead.org (moderated list:ARM/Rockchip SoC support), linux-kernel@vger.kernel.org (open list) Cc: Anand Moon Subject: [PATCH v8 3/3] PCI: rockchip: Refactor rockchip_pcie_disable_clocks() function signature Date: Mon, 14 Oct 2024 19:22:04 +0530 Message-ID: <20241014135210.224913-4-linux.amoon@gmail.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20241014135210.224913-1-linux.amoon@gmail.com> References: <20241014135210.224913-1-linux.amoon@gmail.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Refactor the rockchip_pcie_disable_clocks() function to accept a struct rockchip_pcie pointer instead of a void pointer. This change improves type safety and code readability by explicitly specifying the expected data type. Reviewed-by: Manivannan Sadhasivam Signed-off-by: Anand Moon --- v8: add add the missing () in the function name. v7: None v6: Fix the subject, add the missing () in the function name. v5: Fix the commit message and add r-b Manivannan. v4: None v3: None v2: No --- drivers/pci/controller/pcie-rockchip.c | 3 +-- drivers/pci/controller/pcie-rockchip.h | 2 +- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/pcie-rockchip.c b/drivers/pci/controller/pcie-rockchip.c index 43d83c1f3196..eaaab7c11323 100644 --- a/drivers/pci/controller/pcie-rockchip.c +++ b/drivers/pci/controller/pcie-rockchip.c @@ -265,9 +265,8 @@ int rockchip_pcie_enable_clocks(struct rockchip_pcie *rockchip) } EXPORT_SYMBOL_GPL(rockchip_pcie_enable_clocks); -void rockchip_pcie_disable_clocks(void *data) +void rockchip_pcie_disable_clocks(struct rockchip_pcie *rockchip) { - struct rockchip_pcie *rockchip = data; clk_bulk_disable_unprepare(rockchip->num_clks, rockchip->clks); } diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h index cc667c73d42f..3c63166fdc17 100644 --- a/drivers/pci/controller/pcie-rockchip.h +++ b/drivers/pci/controller/pcie-rockchip.h @@ -347,7 +347,7 @@ int rockchip_pcie_init_port(struct rockchip_pcie *rockchip); int rockchip_pcie_get_phys(struct rockchip_pcie *rockchip); void rockchip_pcie_deinit_phys(struct rockchip_pcie *rockchip); int rockchip_pcie_enable_clocks(struct rockchip_pcie *rockchip); -void rockchip_pcie_disable_clocks(void *data); +void rockchip_pcie_disable_clocks(struct rockchip_pcie *rockchip); void rockchip_pcie_cfg_configuration_accesses( struct rockchip_pcie *rockchip, u32 type);