From patchwork Wed Nov 6 09:03:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shuai Xue X-Patchwork-Id: 13864121 Received: from out30-111.freemail.mail.aliyun.com (out30-111.freemail.mail.aliyun.com [115.124.30.111]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0A6151D7E43; Wed, 6 Nov 2024 09:03:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=115.124.30.111 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730883837; cv=none; b=rE6GImjzW6ZBZPkJYfFm2jctr7TylDjrXm8stR0iP8TysevhU3hDzezDzT9rEMx0p+mZNbP0SHBrgIFrQq7w1HAQmcRDbtK/Dc+Z5SAO5Kcy5Yuc2JJhSDcm1owo63b0DZ8edzYPCqAPjm91mHnjjtop7DbTYhAUdS9dMg+tBmw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730883837; c=relaxed/simple; bh=hSk5uJpzBExlePYCdMBdO38yMGHGT7ad4Xa5nZEaNvw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=jZivfozOtTTb1hsWHMBXDyoIw8qGW/5r7CQrC46EqNoOvp8zcv96IjrhFDr2CffqyY1RT42VRhcrb3qdw8bHGDpkjOSF5SrAgkqB3IDzNNYZbWbRrEYH7kqCDKg4z1pv0LTyKbTfNhFIj5MxdZAdjdNKfmzJ1NpsLdcCLSgdbeo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.alibaba.com; spf=pass smtp.mailfrom=linux.alibaba.com; dkim=pass (1024-bit key) header.d=linux.alibaba.com header.i=@linux.alibaba.com header.b=E9BhX1hg; arc=none smtp.client-ip=115.124.30.111 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.alibaba.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.alibaba.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.alibaba.com header.i=@linux.alibaba.com header.b="E9BhX1hg" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.alibaba.com; s=default; t=1730883832; h=From:To:Subject:Date:Message-ID:MIME-Version; bh=sY7Z9BR09yOOlGFLTTGT6/8MnEXmmjsyzvm3AoRrWco=; b=E9BhX1hgR8kEoCCtDTYktwfeMbwG9h/5TPdpIUE1tr9fLOsfxi9Sp3cyRnS/ltCQwWmpCX84hgELBLOvDg+CSGkJcLzbuGhvVg+uhSqAavXeKMY+TAG0JkqGc6alyk5N5TMl8ngCfqc/vnkgXobGobKXDA3MfS1u6BBdNRTQS3c= Received: from localhost.localdomain(mailfrom:xueshuai@linux.alibaba.com fp:SMTPD_---0WIqmpD6_1730883830 cluster:ay36) by smtp.aliyun-inc.com; Wed, 06 Nov 2024 17:03:51 +0800 From: Shuai Xue To: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Cc: bhelgaas@google.com, mahesh@linux.ibm.com, oohall@gmail.com, sathyanarayanan.kuppuswamy@linux.intel.com, xueshuai@linux.alibaba.com Subject: [RFC PATCH v1 1/2] PCI/AER: run recovery on device that detected the error Date: Wed, 6 Nov 2024 17:03:38 +0800 Message-ID: <20241106090339.24920-2-xueshuai@linux.alibaba.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20241106090339.24920-1-xueshuai@linux.alibaba.com> References: <20241106090339.24920-1-xueshuai@linux.alibaba.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The current implementation of pcie_do_recovery() assumes that the recovery process is executed on the device that detected the error. However, the DPC driver currently passes the error port that experienced the DPC event to pcie_do_recovery(). Use the SOURCE ID register to correctly identify the device that detected the error. By passing this error-detecting device to pcie_do_recovery(), subsequent patches will be able to accurately access the AER error status. Signed-off-by: Shuai Xue --- drivers/pci/pci.h | 2 +- drivers/pci/pcie/dpc.c | 30 ++++++++++++++++++++++++------ drivers/pci/pcie/edr.c | 35 ++++++++++++++++++----------------- 3 files changed, 43 insertions(+), 24 deletions(-) diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 14d00ce45bfa..0866f79aec54 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -521,7 +521,7 @@ struct rcec_ea { void pci_save_dpc_state(struct pci_dev *dev); void pci_restore_dpc_state(struct pci_dev *dev); void pci_dpc_init(struct pci_dev *pdev); -void dpc_process_error(struct pci_dev *pdev); +struct pci_dev *dpc_process_error(struct pci_dev *pdev); pci_ers_result_t dpc_reset_link(struct pci_dev *pdev); bool pci_dpc_recovered(struct pci_dev *pdev); #else diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c index 2b6ef7efa3c1..62a68cde4364 100644 --- a/drivers/pci/pcie/dpc.c +++ b/drivers/pci/pcie/dpc.c @@ -257,10 +257,17 @@ static int dpc_get_aer_uncorrect_severity(struct pci_dev *dev, return 1; } -void dpc_process_error(struct pci_dev *pdev) +/** + * dpc_process_error - handle the DPC error status + * @pdev: the port that experienced the containment event + * + * Return the device that experienced the error. + */ +struct pci_dev *dpc_process_error(struct pci_dev *pdev) { u16 cap = pdev->dpc_cap, status, source, reason, ext_reason; struct aer_err_info info; + struct pci_dev *err_dev = NULL; pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &status); pci_read_config_word(pdev, cap + PCI_EXP_DPC_SOURCE_ID, &source); @@ -283,6 +290,13 @@ void dpc_process_error(struct pci_dev *pdev) "software trigger" : "reserved error"); + if (reason == PCI_EXP_DPC_STATUS_TRIGGER_RSN_NFE || + reason == PCI_EXP_DPC_STATUS_TRIGGER_RSN_FE) + err_dev = pci_get_domain_bus_and_slot(pci_domain_nr(pdev->bus), + PCI_BUS_NUM(source), source & 0xff); + else + err_dev = pci_dev_get(pdev); + /* show RP PIO error detail information */ if (pdev->dpc_rp_extensions && reason == PCI_EXP_DPC_STATUS_TRIGGER_RSN_IN_EXT && @@ -295,6 +309,8 @@ void dpc_process_error(struct pci_dev *pdev) pci_aer_clear_nonfatal_status(pdev); pci_aer_clear_fatal_status(pdev); } + + return err_dev; } static void pci_clear_surpdn_errors(struct pci_dev *pdev) @@ -350,21 +366,23 @@ static bool dpc_is_surprise_removal(struct pci_dev *pdev) static irqreturn_t dpc_handler(int irq, void *context) { - struct pci_dev *pdev = context; + struct pci_dev *err_port = context, *err_dev = NULL; /* * According to PCIe r6.0 sec 6.7.6, errors are an expected side effect * of async removal and should be ignored by software. */ - if (dpc_is_surprise_removal(pdev)) { - dpc_handle_surprise_removal(pdev); + if (dpc_is_surprise_removal(err_port)) { + dpc_handle_surprise_removal(err_port); return IRQ_HANDLED; } - dpc_process_error(pdev); + err_dev = dpc_process_error(err_port); /* We configure DPC so it only triggers on ERR_FATAL */ - pcie_do_recovery(pdev, pci_channel_io_frozen, dpc_reset_link); + pcie_do_recovery(err_dev, pci_channel_io_frozen, dpc_reset_link); + + pci_dev_put(err_dev); return IRQ_HANDLED; } diff --git a/drivers/pci/pcie/edr.c b/drivers/pci/pcie/edr.c index e86298dbbcff..6ac95e5e001b 100644 --- a/drivers/pci/pcie/edr.c +++ b/drivers/pci/pcie/edr.c @@ -150,7 +150,7 @@ static int acpi_send_edr_status(struct pci_dev *pdev, struct pci_dev *edev, static void edr_handle_event(acpi_handle handle, u32 event, void *data) { - struct pci_dev *pdev = data, *edev; + struct pci_dev *pdev = data, *err_port, *err_dev = NULL; pci_ers_result_t estate = PCI_ERS_RESULT_DISCONNECT; u16 status; @@ -169,36 +169,36 @@ static void edr_handle_event(acpi_handle handle, u32 event, void *data) * may be that port or a parent of it (PCI Firmware r3.3, sec * 4.6.13). */ - edev = acpi_dpc_port_get(pdev); - if (!edev) { + err_port = acpi_dpc_port_get(pdev); + if (!err_port) { pci_err(pdev, "Firmware failed to locate DPC port\n"); return; } - pci_dbg(pdev, "Reported EDR dev: %s\n", pci_name(edev)); + pci_dbg(pdev, "Reported EDR dev: %s\n", pci_name(err_port)); /* If port does not support DPC, just send the OST */ - if (!edev->dpc_cap) { - pci_err(edev, FW_BUG "This device doesn't support DPC\n"); + if (!err_port->dpc_cap) { + pci_err(err_port, FW_BUG "This device doesn't support DPC\n"); goto send_ost; } /* Check if there is a valid DPC trigger */ - pci_read_config_word(edev, edev->dpc_cap + PCI_EXP_DPC_STATUS, &status); + pci_read_config_word(err_port, err_port->dpc_cap + PCI_EXP_DPC_STATUS, &status); if (!(status & PCI_EXP_DPC_STATUS_TRIGGER)) { - pci_err(edev, "Invalid DPC trigger %#010x\n", status); + pci_err(err_port, "Invalid DPC trigger %#010x\n", status); goto send_ost; } - dpc_process_error(edev); - pci_aer_raw_clear_status(edev); + err_dev = dpc_process_error(err_port); + pci_aer_raw_clear_status(err_port); /* * Irrespective of whether the DPC event is triggered by ERR_FATAL * or ERR_NONFATAL, since the link is already down, use the FATAL * error recovery path for both cases. */ - estate = pcie_do_recovery(edev, pci_channel_io_frozen, dpc_reset_link); + estate = pcie_do_recovery(err_dev, pci_channel_io_frozen, dpc_reset_link); send_ost: @@ -207,15 +207,16 @@ static void edr_handle_event(acpi_handle handle, u32 event, void *data) * to firmware. If not successful, send _OST(0xF, BDF << 16 | 0x81). */ if (estate == PCI_ERS_RESULT_RECOVERED) { - pci_dbg(edev, "DPC port successfully recovered\n"); - pcie_clear_device_status(edev); - acpi_send_edr_status(pdev, edev, EDR_OST_SUCCESS); + pci_dbg(err_port, "DPC port successfully recovered\n"); + pcie_clear_device_status(err_port); + acpi_send_edr_status(pdev, err_port, EDR_OST_SUCCESS); } else { - pci_dbg(edev, "DPC port recovery failed\n"); - acpi_send_edr_status(pdev, edev, EDR_OST_FAILED); + pci_dbg(err_port, "DPC port recovery failed\n"); + acpi_send_edr_status(pdev, err_port, EDR_OST_FAILED); } - pci_dev_put(edev); + pci_dev_put(err_port); + pci_dev_put(err_dev); } void pci_acpi_add_edr_notifier(struct pci_dev *pdev)