From patchwork Thu Nov 7 13:50:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "lorenzo@kernel.org" X-Patchwork-Id: 13866535 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CF3A9212646 for ; Thu, 7 Nov 2024 13:51:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730987484; cv=none; b=GVGFtC+EMAcYvlZ0Q43iH+yaQhZ8rNzU6IkCMHb1AhV+TjKxbVaT7bl0QE1ojdgeoMQI8UjCZL/uUZG3a9NsLbI/cSdaNjQ3jstpkNWeDJSq3IBBcxKprNZKLl+hPHQxFzCnuN+sv61CaYRHYC2muXRR3gFZKt8VDP4Ju8GtlJA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730987484; c=relaxed/simple; bh=WjKW4w6m9vxglUpKnIKGk6mwn72chjGL/VfCQGNIAxM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=snxQGu0CzfD797aN/mXGJd1wE2TwyAO96vxti8jmYTGCShe3i00PcWHMdxK8+ZmVc4mEAJwd4iCB2y5QZARrgzjkXmRBtkJctbdIBZzJWkAUq9SokciDyDpFb5nLPHNtTw9z7YhvxoaX61AIxrzQddPUJfmGSab7x/AoVyhSIoM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ExGndzms; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ExGndzms" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5BBB6C4CECC; Thu, 7 Nov 2024 13:51:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1730987484; bh=WjKW4w6m9vxglUpKnIKGk6mwn72chjGL/VfCQGNIAxM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=ExGndzmsAu9yPvANhTikksjegfEO+gzD/zauKwUogXN0B4EhHorTvDxNnlxhF2RIv aOLG0RQ6HCywBNB8fJRWXcPvi7seUek9snum1XkoQBmfmKPOKwImKPD/xdkEqkfn2U 50oUpSQd84YFiZxHhbG3tH2NvGdiUxNkNkO79grcxDTydShRmbYqnrZ1LtdvpcNrTQ d1e/mDu7rcnUs9IPw/oVU5knuJnWEMI0IWP/tZ7v9G7SH88+0/Qzv9GAHf7AU1Gboi 8l3SogVe1V1KMC0vkQYX87wuBDWxZf13iU8Wd5bWCFH4cCG/J9VpmTWOVXd8y2G3T2 bJMkuClCQZCMw== From: Lorenzo Bianconi Date: Thu, 07 Nov 2024 14:50:53 +0100 Subject: [PATCH 1/3] PCI: mediatek-gen3: Add missing reset_control_deassert for mac_rst in mtk_pcie_en7581_power_up Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241107-pcie-en7581-fixes-v1-1-af0c872323c7@kernel.org> References: <20241107-pcie-en7581-fixes-v1-0-af0c872323c7@kernel.org> In-Reply-To: <20241107-pcie-en7581-fixes-v1-0-af0c872323c7@kernel.org> To: Ryder Lee , Jianjun Wang , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno Cc: linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Lorenzo Bianconi X-Mailer: b4 0.14.2 Even if this is not a real issue since Airoha EN7581 SoC does not require the mac reset line, add missing reset_control_deassert() for mac reset line in mtk_pcie_en7581_power_up callback. Signed-off-by: Lorenzo Bianconi --- drivers/pci/controller/pcie-mediatek-gen3.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/pci/controller/pcie-mediatek-gen3.c b/drivers/pci/controller/pcie-mediatek-gen3.c index 66ce4b5d309bb6d64618c70ac5e0a529e0910511..0fac0b9fd785e463d26d29d695b923db41eef9cc 100644 --- a/drivers/pci/controller/pcie-mediatek-gen3.c +++ b/drivers/pci/controller/pcie-mediatek-gen3.c @@ -897,6 +897,9 @@ static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie) */ mdelay(PCIE_EN7581_RESET_TIME_MS); + /* MAC power on and enable transaction layer clocks */ + reset_control_deassert(pcie->mac_reset); + pm_runtime_enable(dev); pm_runtime_get_sync(dev); @@ -931,6 +934,7 @@ static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie) err_clk_prepare: pm_runtime_put_sync(dev); pm_runtime_disable(dev); + reset_control_assert(pcie->mac_reset); reset_control_bulk_assert(pcie->soc->phy_resets.num_resets, pcie->phy_resets); err_phy_deassert: phy_power_off(pcie->phy);