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Fri, 22 Nov 2024 19:10:24 GMT Received: from hu-krichai-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Fri, 22 Nov 2024 11:10:20 -0800 From: Krishna chaitanya chundru Date: Sat, 23 Nov 2024 00:40:01 +0530 Subject: [PATCH v5 3/3] PCI: qcom: Update ICC and OPP values during link up event Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20241123-remove_wait2-v5-3-b5f9e6b794c2@quicinc.com> References: <20241123-remove_wait2-v5-0-b5f9e6b794c2@quicinc.com> In-Reply-To: <20241123-remove_wait2-v5-0-b5f9e6b794c2@quicinc.com> To: Jingoo Han , Manivannan Sadhasivam , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas , Konrad Dybcio CC: , , , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , , , , "Krishna chaitanya chundru" X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1732302607; l=1500; i=quic_krichai@quicinc.com; s=20230907; h=from:subject:message-id; bh=8NH2yB5xLLOnt00p6vqPplFTBNCd7hf+CR6j9FI9O9w=; b=jlHUMlK9os0a8uibvg0sVDUzDjiY3qOtLeMErY2m/f7oPN5ohfhFbaH+WVkWyPjT3nl3Os3fw G3zKqogA3PNANNQOGuLoQb5Z5HddzezixH879QKjol/gaxyK3xox2Js X-Developer-Key: i=quic_krichai@quicinc.com; a=ed25519; pk=10CL2pdAKFyzyOHbfSWHCD0X0my7CXxj8gJScmn1FAg= X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: ZW5XeqCWSW5aqWZuIajKE7S8NrFEYUIm X-Proofpoint-GUID: ZW5XeqCWSW5aqWZuIajKE7S8NrFEYUIm X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 suspectscore=0 clxscore=1015 phishscore=0 malwarescore=0 impostorscore=0 lowpriorityscore=0 mlxlogscore=897 spamscore=0 adultscore=0 mlxscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411220161 The 'commit 4581403f6792 ("PCI: qcom: Enumerate endpoints based on Link up event in 'global_irq' interrupt")' added the Link up based enumeration support failed to update the ICC/OPP vote once link is up. Earlier, the update happens during probe and the endpoints may or may not be enumerated at that time. So the ICC/OPP vote was not guaranteed to be accurate. Now with the Link up based enumeration support, the driver can request the accurate vote based on the PCIe link. So call qcom_pcie_icc_opp_update() in qcom_pcie_global_irq_thread() after enumerating the endpoints. Fixes: 4581403f6792 ("PCI: qcom: Enumerate endpoints based on Link up event in 'global_irq' interrupt") Reviewed-by: Manivannan Sadhasivam Signed-off-by: Krishna chaitanya chundru --- drivers/pci/controller/dwc/pcie-qcom.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index 656d2be9d87f..e4d3366ead1f 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -1569,6 +1569,8 @@ static irqreturn_t qcom_pcie_global_irq_thread(int irq, void *data) pci_lock_rescan_remove(); pci_rescan_bus(pp->bridge->bus); pci_unlock_rescan_remove(); + + qcom_pcie_icc_opp_update(pcie); } else { dev_WARN_ONCE(dev, 1, "Received unknown event. INT_STATUS: 0x%08x\n", status);