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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: WuEhwjlj1xnlJOWD7f97WU8QFJNzoNQp7AF9Z6K8FZqIZVx3chURSzK6qc+KioydpZyXgUg2MFW3Sm9xLgEGH2xeQq/+wLgcess5n8SJ3SN0zqLR31En7XO1LFqq2HFfwJV75Ghj3u6JMLqvL01GAS7c807Jc9srRyfPWuUnvGEhAlTDrGxNc6/FuEM0VXhWwcACwYHhjiyOA4oCddGgEadhkDWhBupFxVuiZlFAH4CmqaoyDGYxAiVEgZQFfkidtnwFzf63d/99u4L9Wda0kIjaRm08gPqRkNKmNbX/7GKSLoNqKMCNC2QsA6WIPFsW9DXHvvNYjVwVR+lQdWYBbK7Of2okAuf2uzEDxc+WkgTGk38tVS36DyfPFS5U/A+LzggQwz7Faz3RBMi8b4iNljPvKUiTAqzwVLu65Ua0aaZMAzNBohhQh1/LUIKV99FFqpDVADuDJnowfXZB9hmv0k1akVQQBGhhPHzP7+jGPRzOYoxyJypbD3JmL3aH5JCad4CK/6yDPsln+zdc1MNFphTtAxnNFo6swlGs4amIcLPJRr3GynDDS+J3PYUndnjYrj17P4sa6/KPIpRnHn8RSzQ051MtnhgkGT6GM6YwW5rX7breKH6XKUrJJlP+w3H6AaMFqq0jX2ZnkVJUHtZNxgUxfNJICA6rT9E/8aq2POFyzVnKUsYXh4hTimepBiq5loqQDzc6f3S0Ql1RV93YY0To5Rw9uCd/ap1eelY5EH9XixPyu19cnxj57mVCUif8ZVU6Hi+S56AAwqB+u7KU8Woh/TPRpBZXPsvbYtalTzcq9wthMRQqD306MT9Ehvmn5sHcqdujwti9Ht3pL/5+0+L3jlBZO2uFt761WQUlvvDmPXKz5dLjfINHyLBg1OuG2GojdU2smMDfLrojMPjOApdv4v7Mb1YAbcO/pGzi9BvVzBESPwhgzYmlBZJlQpo/Zpo2/1k/iK9ksbyw4LHMasTIivZfFgMkW39ngmdkkV7kTq7NiUJtqZi05X+j/tmuSGvvvVMi7s0KB2D06rUJvuU+xlMv3JgkApV5Sy3cpf7UTubhYWHrwHUjz4W/cmrY5JeSfhFk1pVOXeJoZdtbLQAlikWEDnGs0cibTK501ZUyKTg9MxFAowIgQ5gdVJecp5xIRqUPdhWS6SG0gFeNQRbvYOJGtfCBCFMvQ9Rid23gKs/J514NSdO6+PYv2E5nQMatJvmKHLHKpo1u7A65BoUg12gZ1QKHm/rWS8J3MSrEFYAwe4JvW+1FMF/sXu99sfh4jZP3cvaKb4zVuuqvz6ba0zGy4d8WhDQblPjNDkmwH3ljHSH9/3d1UMcWMm78bAQHQccghu18PGShqpqO+x1Cv8ivVAcM7IZ7/s//b4VQxZQoLIJS+53HAGSVtTXrGh1MfseuFeAHndB4jwKdjSuvfQnRA2ZYBC+2xi4SGx+uz2GocH4ijvtXgQ0oSSONKajY/gNNasefL6RKGRFnhm/MGknR0oVfqyE61zzPq2U6+rGMXmzFtK2ppCPNyRAbW8f1kliD4I8/t/I7hzv8knLwxC2yyQ8aYyElfM7+qoAvPS4t116rXrf6MMTma5lk X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 9600350a-d2ba-45b9-2f49-08dd0df02219 X-MS-Exchange-CrossTenant-AuthSource: AS8PR04MB8676.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Nov 2024 07:58:37.4304 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: q8Wx+AYziR1x9uLuEKsv/bvWp0Fj3P9weS5nQA97eZmAIEB4kGfZIZHbJe1CH+6BXIhIUYFNG19GFlDmCwuwnA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAXPR04MB8489 From: Frank Li Call common dwc suspend/resume function. Use dwc common iATU method to send out PME_TURN_OFF message. In Old DWC implementations, PCIE_ATU_INHIBIT_PAYLOAD bit in iATU Ctrl2 register is reserved. So the generic DWC implementation of sending the PME_Turn_Off message using a dummy MMIO write cannot be used. Use previouse method to kick off PME_TURN_OFF MSG for these platforms. SRC(System Reset Control) interface is used to toggle 'turnoff_reset' to send PME_TURN_OFF and since the DWC implementation is used, it is not needed now. Replace the imx_pcie_stop_link() and imx_pcie_host_exit() by dw_pcie_suspend_noirq() in imx_pcie_suspend_noirq(). Since dw_pcie_suspend_noirq() already does these, see below call stack: dw_pcie_suspend_noirq() dw_pcie_stop_link(); imx_pcie_stop_link(); pci->pp.ops->deinit(); imx_pcie_host_exit(); Replace the imx_pcie_host_init(), dw_pcie_setup_rc() and imx_pcie_start_link() by dw_pcie_resume_noirq() in imx_pcie_resume_noirq(). Since dw_pcie_resume_noirq() already does these, see below call stack: dw_pcie_resume_noirq() pci->pp.ops->init(); imx_pcie_host_init(); dw_pcie_setup_rc(); dw_pcie_start_link(); imx_pcie_start_link(); Signed-off-by: Frank Li Signed-off-by: Richard Zhu --- drivers/pci/controller/dwc/pci-imx6.c | 96 ++++++++++----------------- 1 file changed, 35 insertions(+), 61 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 743a71789d17..87dac4ac9d10 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -33,6 +33,7 @@ #include #include +#include "../../pci.h" #include "pcie-designware.h" #define IMX8MQ_GPR_PCIE_REF_USE_PAD BIT(9) @@ -112,19 +113,18 @@ struct imx_pcie_drvdata { int (*init_phy)(struct imx_pcie *pcie); int (*enable_ref_clk)(struct imx_pcie *pcie, bool enable); int (*core_reset)(struct imx_pcie *pcie, bool assert); + const struct dw_pcie_host_ops *ops; }; struct imx_pcie { struct dw_pcie *pci; struct gpio_desc *reset_gpiod; - bool link_is_up; struct clk_bulk_data clks[IMX_PCIE_MAX_CLKS]; struct regmap *iomuxc_gpr; u16 msi_ctrl; u32 controller_id; struct reset_control *pciephy_reset; struct reset_control *apps_reset; - struct reset_control *turnoff_reset; u32 tx_deemph_gen1; u32 tx_deemph_gen2_3p5db; u32 tx_deemph_gen2_6db; @@ -903,13 +903,11 @@ static int imx_pcie_start_link(struct dw_pcie *pci) dev_info(dev, "Link: Only Gen1 is enabled\n"); } - imx_pcie->link_is_up = true; tmp = dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKSTA); dev_info(dev, "Link up, Gen%i\n", tmp & PCI_EXP_LNKSTA_CLS); return 0; err_reset_phy: - imx_pcie->link_is_up = false; dev_dbg(dev, "PHY DEBUG_R0=0x%08x DEBUG_R1=0x%08x\n", dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0), dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG1)); @@ -1014,9 +1012,31 @@ static void imx_pcie_host_exit(struct dw_pcie_rp *pp) regulator_disable(imx_pcie->vpcie); } +/* + * In Old DWC implementations, PCIE_ATU_INHIBIT_PAYLOAD bit in iATU Ctrl2 + * register is reserved. So the generic DWC implementation of sending the + * PME_Turn_Off message using a dummy MMIO write cannot be used. + */ +static void imx_pcie_pme_turn_off(struct dw_pcie_rp *pp) +{ + struct dw_pcie *pci = to_dw_pcie_from_pp(pp); + struct imx_pcie *imx_pcie = to_imx_pcie(pci); + + regmap_set_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_PM_TURN_OFF); + regmap_clear_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_PM_TURN_OFF); + + usleep_range(PCIE_PME_TO_L2_TIMEOUT_US/10, PCIE_PME_TO_L2_TIMEOUT_US); +} + static const struct dw_pcie_host_ops imx_pcie_host_ops = { .init = imx_pcie_host_init, .deinit = imx_pcie_host_exit, + .pme_turn_off = imx_pcie_pme_turn_off, +}; + +static const struct dw_pcie_host_ops imx_pcie_host_dw_pme_ops = { + .init = imx_pcie_host_init, + .deinit = imx_pcie_host_exit, }; static const struct dw_pcie_ops dw_pcie_ops = { @@ -1143,43 +1163,6 @@ static int imx_add_pcie_ep(struct imx_pcie *imx_pcie, return 0; } -static void imx_pcie_pm_turnoff(struct imx_pcie *imx_pcie) -{ - struct device *dev = imx_pcie->pci->dev; - - /* Some variants have a turnoff reset in DT */ - if (imx_pcie->turnoff_reset) { - reset_control_assert(imx_pcie->turnoff_reset); - reset_control_deassert(imx_pcie->turnoff_reset); - goto pm_turnoff_sleep; - } - - /* Others poke directly at IOMUXC registers */ - switch (imx_pcie->drvdata->variant) { - case IMX6SX: - case IMX6QP: - regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, - IMX6SX_GPR12_PCIE_PM_TURN_OFF, - IMX6SX_GPR12_PCIE_PM_TURN_OFF); - regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, - IMX6SX_GPR12_PCIE_PM_TURN_OFF, 0); - break; - default: - dev_err(dev, "PME_Turn_Off not implemented\n"); - return; - } - - /* - * Components with an upstream port must respond to - * PME_Turn_Off with PME_TO_Ack but we can't check. - * - * The standard recommends a 1-10ms timeout after which to - * proceed anyway as if acks were received. - */ -pm_turnoff_sleep: - usleep_range(1000, 10000); -} - static void imx_pcie_msi_save_restore(struct imx_pcie *imx_pcie, bool save) { u8 offset; @@ -1203,7 +1186,6 @@ static void imx_pcie_msi_save_restore(struct imx_pcie *imx_pcie, bool save) static int imx_pcie_suspend_noirq(struct device *dev) { struct imx_pcie *imx_pcie = dev_get_drvdata(dev); - struct dw_pcie_rp *pp = &imx_pcie->pci->pp; if (!(imx_pcie->drvdata->flags & IMX_PCIE_FLAG_SUPPORTS_SUSPEND)) return 0; @@ -1218,9 +1200,7 @@ static int imx_pcie_suspend_noirq(struct device *dev) imx_pcie_assert_core_reset(imx_pcie); imx_pcie->drvdata->enable_ref_clk(imx_pcie, false); } else { - imx_pcie_pm_turnoff(imx_pcie); - imx_pcie_stop_link(imx_pcie->pci); - imx_pcie_host_exit(pp); + return dw_pcie_suspend_noirq(imx_pcie->pci); } return 0; @@ -1230,7 +1210,6 @@ static int imx_pcie_resume_noirq(struct device *dev) { int ret; struct imx_pcie *imx_pcie = dev_get_drvdata(dev); - struct dw_pcie_rp *pp = &imx_pcie->pci->pp; if (!(imx_pcie->drvdata->flags & IMX_PCIE_FLAG_SUPPORTS_SUSPEND)) return 0; @@ -1250,17 +1229,12 @@ static int imx_pcie_resume_noirq(struct device *dev) ret = dw_pcie_setup_rc(&imx_pcie->pci->pp); if (ret) return ret; - imx_pcie_msi_save_restore(imx_pcie, false); } else { - ret = imx_pcie_host_init(pp); + ret = dw_pcie_resume_noirq(imx_pcie->pci); if (ret) return ret; - imx_pcie_msi_save_restore(imx_pcie, false); - dw_pcie_setup_rc(pp); - - if (imx_pcie->link_is_up) - imx_pcie_start_link(imx_pcie->pci); } + imx_pcie_msi_save_restore(imx_pcie, false); return 0; } @@ -1291,11 +1265,15 @@ static int imx_pcie_probe(struct platform_device *pdev) pci->dev = dev; pci->ops = &dw_pcie_ops; - pci->pp.ops = &imx_pcie_host_ops; imx_pcie->pci = pci; imx_pcie->drvdata = of_device_get_match_data(dev); + if (imx_pcie->drvdata->ops) + pci->pp.ops = imx_pcie->drvdata->ops; + else + pci->pp.ops = &imx_pcie_host_dw_pme_ops; + /* Find the PHY if one is defined, only imx7d uses it */ np = of_parse_phandle(node, "fsl,imx7d-pcie-phy", 0); if (np) { @@ -1368,13 +1346,6 @@ static int imx_pcie_probe(struct platform_device *pdev) break; } - /* Grab turnoff reset */ - imx_pcie->turnoff_reset = devm_reset_control_get_optional_exclusive(dev, "turnoff"); - if (IS_ERR(imx_pcie->turnoff_reset)) { - dev_err(dev, "Failed to get TURNOFF reset control\n"); - return PTR_ERR(imx_pcie->turnoff_reset); - } - if (imx_pcie->drvdata->gpr) { /* Grab GPR config register range */ imx_pcie->iomuxc_gpr = @@ -1454,6 +1425,7 @@ static int imx_pcie_probe(struct platform_device *pdev) if (ret < 0) return ret; } else { + pci->pp.use_atu_msg = true; ret = dw_pcie_host_init(&pci->pp); if (ret < 0) return ret; @@ -1519,6 +1491,7 @@ static const struct imx_pcie_drvdata drvdata[] = { .init_phy = imx6sx_pcie_init_phy, .enable_ref_clk = imx6sx_pcie_enable_ref_clk, .core_reset = imx6sx_pcie_core_reset, + .ops = &imx_pcie_host_ops, }, [IMX6QP] = { .variant = IMX6QP, @@ -1536,6 +1509,7 @@ static const struct imx_pcie_drvdata drvdata[] = { .init_phy = imx_pcie_init_phy, .enable_ref_clk = imx6q_pcie_enable_ref_clk, .core_reset = imx6qp_pcie_core_reset, + .ops = &imx_pcie_host_ops, }, [IMX7D] = { .variant = IMX7D,