Message ID | 20241208043928.3287585-2-thippeswamy.havalige@amd.com (mailing list archive) |
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State | Superseded |
Headers | show
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client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by SJ5PEPF000001CB.mail.protection.outlook.com (10.167.242.40) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8230.7 via Frontend Transport; Sun, 8 Dec 2024 04:39:54 +0000 Received: from SATLEXMB03.amd.com (10.181.40.144) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Sat, 7 Dec 2024 22:39:53 -0600 Received: from xhdthippesw40.xilinx.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2507.39 via Frontend Transport; Sat, 7 Dec 2024 22:39:50 -0600 From: Thippeswamy Havalige <thippeswamy.havalige@amd.com> To: <bhelgaas@google.com>, <lpieralisi@kernel.org>, <kw@linux.com>, <manivannan.sadhasivam@linaro.org>, <robh@kernel.org>, <krzk+dt@kernel.org>, <conor+dt@kernel.org> CC: <linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <jingoohan1@gmail.com>, <michal.simek@amd.com>, <bharat.kumar.gogada@amd.com>, Thippeswamy Havalige <thippeswamy.havalige@amd.com> Subject: [PATCH v5 1/3] dt-bindings: PCI: dwc: Add AMD Versal2 mdb slcr support Date: Sun, 8 Dec 2024 10:09:26 +0530 Message-ID: <20241208043928.3287585-2-thippeswamy.havalige@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241208043928.3287585-1-thippeswamy.havalige@amd.com> References: <20241208043928.3287585-1-thippeswamy.havalige@amd.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: <linux-pci.vger.kernel.org> List-Subscribe: <mailto:linux-pci+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-pci+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Received-SPF: None (SATLEXMB04.amd.com: thippeswamy.havalige@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF000001CB:EE_|MW6PR12MB8834:EE_ X-MS-Office365-Filtering-Correlation-Id: a97aa39e-f6f4-44e4-2320-08dd17425ccf X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|82310400026|36860700013|1800799024; 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Add support for AMD MDB IP as Root Port
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diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml index 548f59d76ef2..696568e81cfc 100644 --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml @@ -113,6 +113,8 @@ properties: enum: [ smu, mpu ] - description: Tegra234 aperture enum: [ ecam ] + - description: AMD MDB PCIe slcr region + const: mdb_pcie_slcr allOf: - contains: const: dbi
Add support for mdb slcr aperture that is only supported for AMD Versal2 devices. Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com> --- Changes in v3: ------------- - Introduced below changes in dwc yaml schema. Changes in v5: ------------- - Modify mdb_pcie_slcr as constant. --- Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml | 2 ++ 1 file changed, 2 insertions(+)