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[1/2] lspci: Add Flit Mode information

Message ID 20241211134840.3375-2-ilpo.jarvinen@linux.intel.com (mailing list archive)
State Handled Elsewhere
Delegated to: Bjorn Helgaas
Headers show
Series lspci: Add Flit mode information and Dev3 from gen6 | expand

Commit Message

Ilpo Järvinen Dec. 11, 2024, 1:48 p.m. UTC 
Add Flit Mode related information:

- Flit Mode Supported to Express Capabilities line (PCIe r6.1 sec
7.5.3.2).
- Flit Mode Disable to LnkCtl register (PCIe r6.1 sec 7.5.3.7).
- Flit Mode Status to LnkSta2 register (PCIe r6.1 sec 7.5.3.20).

Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
---
 lib/header.h |  3 +++
 ls-caps.c    | 14 ++++++++------
 2 files changed, 11 insertions(+), 6 deletions(-)
diff mbox series

Patch

diff --git a/lib/header.h b/lib/header.h
index 0827ac0d4b73..b188313ea033 100644
--- a/lib/header.h
+++ b/lib/header.h
@@ -763,6 +763,7 @@ 
 #define  PCI_EXP_TYPE_ROOT_INT_EP 0x9	/* Root Complex Integrated Endpoint */
 #define  PCI_EXP_TYPE_ROOT_EC 0xa	/* Root Complex Event Collector */
 #define PCI_EXP_FLAGS_SLOT	0x0100	/* Slot implemented */
+#define PCI_EXP_FLAGS_FLIT	0x8000	/* Flit Mode Supported */
 #define PCI_EXP_FLAGS_IRQ	0x3e00	/* Interrupt message number */
 #define PCI_EXP_DEVCAP		0x4	/* Device capabilities */
 #define  PCI_EXP_DEVCAP_PAYLOAD	0x07	/* Max_Payload_Size */
@@ -822,6 +823,7 @@ 
 #define  PCI_EXP_LNKCTL_HWAUTWD	0x0200	/* Hardware Autonomous Width Disable */
 #define  PCI_EXP_LNKCTL_BWMIE	0x0400	/* Bandwidth Mgmt Interrupt Enable */
 #define  PCI_EXP_LNKCTL_AUTBWIE	0x0800	/* Autonomous Bandwidth Mgmt Interrupt Enable */
+#define  PCI_EXP_LNKCTL_FLIT_DIS	0x2000	/* Flit Mode Disable */
 #define PCI_EXP_LNKSTA		0x12	/* Link Status */
 #define  PCI_EXP_LNKSTA_SPEED	0x000f	/* Negotiated Link Speed */
 #define  PCI_EXP_LNKSTA_WIDTH	0x03f0	/* Negotiated Link Width */
@@ -938,6 +940,7 @@ 
 #define  PCI_EXP_LINKSTA2_RETIMER	0x0040	/* Retimer Detected */
 #define  PCI_EXP_LINKSTA2_2RETIMERS	0x0080	/* 2 Retimers Detected */
 #define  PCI_EXP_LINKSTA2_CROSSLINK(x)	(((x) >> 8) & 0x3) /* Crosslink Res */
+#define  PCI_EXP_LINKSTA2_FLIT		0x0400	/* Flit Mode Status */
 #define  PCI_EXP_LINKSTA2_COMPONENT(x)	(((x) >> 12) & 0x7) /* Presence */
 #define  PCI_EXP_LINKSTA2_DRS_RCVD	0x8000	/* DRS Msg Received */
 #define PCI_EXP_SLTCAP2			0x34	/* Slot Capabilities */
diff --git a/ls-caps.c b/ls-caps.c
index c2aaea573234..38a171a5fe4d 100644
--- a/ls-caps.c
+++ b/ls-caps.c
@@ -843,14 +843,15 @@  static void cap_express_link(struct device *d, int where, int type)
   if ((type == PCI_EXP_TYPE_ROOT_PORT) || (type == PCI_EXP_TYPE_ENDPOINT) ||
       (type == PCI_EXP_TYPE_LEG_END) || (type == PCI_EXP_TYPE_PCI_BRIDGE))
     printf(" RCB %d bytes,", w & PCI_EXP_LNKCTL_RCB ? 128 : 64);
-  printf(" LnkDisable%c CommClk%c\n\t\t\tExtSynch%c ClockPM%c AutWidDis%c BWInt%c AutBWInt%c\n",
+  printf(" LnkDisable%c CommClk%c\n\t\t\tExtSynch%c ClockPM%c AutWidDis%c BWInt%c AutBWInt%c\n\t\t\tFlitModeDis%c\n",
 	FLAG(w, PCI_EXP_LNKCTL_DISABLE),
 	FLAG(w, PCI_EXP_LNKCTL_CLOCK),
 	FLAG(w, PCI_EXP_LNKCTL_XSYNCH),
 	FLAG(w, PCI_EXP_LNKCTL_CLOCKPM),
 	FLAG(w, PCI_EXP_LNKCTL_HWAUTWD),
 	FLAG(w, PCI_EXP_LNKCTL_BWMIE),
-	FLAG(w, PCI_EXP_LNKCTL_AUTBWIE));
+	FLAG(w, PCI_EXP_LNKCTL_AUTBWIE),
+	FLAG(w, PCI_EXP_LNKCTL_FLIT_DIS));
 
   w = get_conf_word(d, where + PCI_EXP_LNKSTA);
   sta_speed = w & PCI_EXP_LNKSTA_SPEED;
@@ -1366,7 +1367,7 @@  static void cap_express_link2(struct device *d, int where, int type)
   w = get_conf_word(d, where + PCI_EXP_LNKSTA2);
   printf("\t\tLnkSta2: Current De-emphasis Level: %s, EqualizationComplete%c EqualizationPhase1%c\n"
 	"\t\t\t EqualizationPhase2%c EqualizationPhase3%c LinkEqualizationRequest%c\n"
-	"\t\t\t Retimer%c 2Retimers%c CrosslinkRes: %s",
+	"\t\t\t Retimer%c 2Retimers%c FlitMode%c CrosslinkRes: %s",
 	cap_express_link2_deemphasis(PCI_EXP_LINKSTA2_DEEMPHASIS(w)),
 	FLAG(w, PCI_EXP_LINKSTA2_EQU_COMP),
 	FLAG(w, PCI_EXP_LINKSTA2_EQU_PHASE1),
@@ -1375,11 +1376,11 @@  static void cap_express_link2(struct device *d, int where, int type)
 	FLAG(w, PCI_EXP_LINKSTA2_EQU_REQ),
 	FLAG(w, PCI_EXP_LINKSTA2_RETIMER),
 	FLAG(w, PCI_EXP_LINKSTA2_2RETIMERS),
+	FLAG(w, PCI_EXP_LINKSTA2_FLIT),
 	cap_express_link2_crosslink_res(PCI_EXP_LINKSTA2_CROSSLINK(w)));
 
   if (exp_downstream_port(type) && (l & PCI_EXP_LNKCAP2_DRS)) {
-    printf(", DRS%c\n"
-	"\t\t\t DownstreamComp: %s\n",
+    printf("\t\t\t DRS%c DownstreamComp: %s\n",
 	FLAG(w, PCI_EXP_LINKSTA2_DRS_RCVD),
 	cap_express_link2_component(PCI_EXP_LINKSTA2_COMPONENT(w)));
   } else
@@ -1502,7 +1503,8 @@  cap_express(struct device *d, int where, int cap)
     default:
       printf("Unknown type %d", type);
   }
-  printf(", IntMsgNum %d\n", (cap & PCI_EXP_FLAGS_IRQ) >> 9);
+  printf(", IntMsgNum %d, FlitMode%c\n", (cap & PCI_EXP_FLAGS_IRQ) >> 9,
+	 FLAG(cap, PCI_EXP_FLAGS_FLIT));
   if (verbose < 2)
     return type;