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a=ed25519-sha256; t=1733999565; l=4075; i=krishna.chundru@oss.qualcomm.com; s=20230907; h=from:subject:message-id; bh=BTyoDXzoLq9s40NBa/pshroRWzYAGvXUT/nxju8J8D0=; b=nVg9cssNaQJ9+5SJTZAjsoxOtUvy8tYvhLTbHmdNdffFV9SKzEw+2nrOjQ1fRbr950FjIAWhj 4dQQDRCIdSKAtKZxhXpjwHYT0v12HBhDr+ihQ37E3gwobNfUZwM74jx X-Developer-Key: i=krishna.chundru@oss.qualcomm.com; a=ed25519; pk=10CL2pdAKFyzyOHbfSWHCD0X0my7CXxj8gJScmn1FAg= X-Proofpoint-ORIG-GUID: pwGTkjLTQTXj29Vkhj6TZpbTSCCmcDtv X-Proofpoint-GUID: pwGTkjLTQTXj29Vkhj6TZpbTSCCmcDtv X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 impostorscore=0 phishscore=0 spamscore=0 clxscore=1011 mlxlogscore=999 malwarescore=0 lowpriorityscore=0 mlxscore=0 bulkscore=0 suspectscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412120073 From: Krishna chaitanya chundru PCIe equalization presets are predefined settings used to optimize signal integrity by compensating for signal loss and distortion in high-speed data transmission. As per PCIe spec 6.0.1 revision section 8.3.3.3 & 4.2.4 for data rates of 8.0 GT/s, 16.0 GT/s, 32.0 GT/s, and 64.0 GT/s, there is a way to configure lane equalization presets for each lane to enhance the PCIe link reliability. Each preset value represents a different combination of pre-shoot and de-emphasis values. For each data rate, different registers are defined: for 8.0 GT/s, registers are defined in section 7.7.3.4; for 16.0 GT/s, in section 7.7.5.9, etc. The 8.0 GT/s rate has an extra receiver preset hint, requiring 16 bits per lane, while the remaining data rates use 8 bits per lane. Based on the number of lanes and the supported data rate, this function reads the device tree property and stores in the presets structure. Signed-off-by: Krishna Chaitanya Chundru --- drivers/pci/of.c | 45 +++++++++++++++++++++++++++++++++++++++++++++ drivers/pci/pci.h | 17 +++++++++++++++-- 2 files changed, 60 insertions(+), 2 deletions(-) diff --git a/drivers/pci/of.c b/drivers/pci/of.c index dacea3fc5128..99e0e7ae12e9 100644 --- a/drivers/pci/of.c +++ b/drivers/pci/of.c @@ -826,3 +826,48 @@ u32 of_pci_get_slot_power_limit(struct device_node *node, return slot_power_limit_mw; } EXPORT_SYMBOL_GPL(of_pci_get_slot_power_limit); + +int of_pci_get_equalization_presets(struct device *dev, + struct pci_eq_presets *presets, + int num_lanes) +{ + char name[20]; + void **preset; + void *temp; + int ret; + + if (of_property_present(dev->of_node, "eq-presets-8gts")) { + presets->eq_presets_8gts = devm_kzalloc(dev, sizeof(u16) * num_lanes, GFP_KERNEL); + if (!presets->eq_presets_8gts) + return -ENOMEM; + + ret = of_property_read_u16_array(dev->of_node, "eq-presets-8gts", + presets->eq_presets_8gts, num_lanes); + if (ret) { + dev_err(dev, "Error reading eq-presets-8gts %d\n", ret); + return ret; + } + } + + for (int i = 1; i < sizeof(struct pci_eq_presets) / sizeof(void *); i++) { + snprintf(name, sizeof(name), "eq-presets-%dgts", 8 << i); + if (of_property_present(dev->of_node, name)) { + temp = devm_kzalloc(dev, sizeof(u8) * num_lanes, GFP_KERNEL); + if (!temp) + return -ENOMEM; + + ret = of_property_read_u8_array(dev->of_node, name, + temp, num_lanes); + if (ret) { + dev_err(dev, "Error %s %d\n", name, ret); + return ret; + } + + preset = (void **)((u8 *)presets + i * sizeof(void *)); + *preset = temp; + } + } + + return 0; +} +EXPORT_SYMBOL_GPL(of_pci_get_equalization_presets); diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 14d00ce45bfa..82362d58bedc 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -731,7 +731,12 @@ static inline u64 pci_rebar_size_to_bytes(int size) } struct device_node; - +struct pci_eq_presets { + void *eq_presets_8gts; + void *eq_presets_16gts; + void *eq_presets_32gts; + void *eq_presets_64gts; +}; #ifdef CONFIG_OF int of_pci_parse_bus_range(struct device_node *node, struct resource *res); int of_get_pci_domain_nr(struct device_node *node); @@ -746,7 +751,9 @@ void pci_set_bus_of_node(struct pci_bus *bus); void pci_release_bus_of_node(struct pci_bus *bus); int devm_of_pci_bridge_init(struct device *dev, struct pci_host_bridge *bridge); - +int of_pci_get_equalization_presets(struct device *dev, + struct pci_eq_presets *presets, + int num_lanes); #else static inline int of_pci_parse_bus_range(struct device_node *node, struct resource *res) @@ -793,6 +800,12 @@ static inline int devm_of_pci_bridge_init(struct device *dev, struct pci_host_br return 0; } +static inline int of_pci_get_equalization_presets(struct device *dev, + struct pci_eq_presets *presets, + int num_lanes) +{ + return 0; +} #endif /* CONFIG_OF */ struct of_changeset;