From patchwork Tue Dec 17 13:53:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Ilpo_J=C3=A4rvinen?= X-Patchwork-Id: 13911845 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 22C6A1E485; Tue, 17 Dec 2024 13:54:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734443665; cv=none; b=lj6BPEGeBpefFGfqDKlxLyJlNjuGaR1TWOd6ZR/sL5ZDvRzy4BF+2iup2c90QOJHKJ1R0O3OUEzVG6bmlwVbQb1Cl5oP/uw+0kWwQDcYf+SE2ojjE9oFnYH/SNKG08Jn+bwD5XZmYTDvl/toAwQGVj63YLuMFtx3wGfZw3qhwMs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734443665; c=relaxed/simple; bh=pEPLOEVYfxTevDLItm+PDeMI6pv8ZNbePX0cYmjRMKk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=fDs2bxHozIlMdfyXo7jw2gZ0jLHOJTPdM2zCJaVjnByJjXJEDilX76pN4q3UWRc71c1rxTiwQmG2biS36cPoHUL8r40leuVLvoW0vjFLWBkCLXwe3dsJkNoACMfysCEGNDPlQI8OM8u+z2oqJCpGP4O2E/hNWIv58hh6EKh+zkE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=CPqAcwxp; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="CPqAcwxp" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1734443664; x=1765979664; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=pEPLOEVYfxTevDLItm+PDeMI6pv8ZNbePX0cYmjRMKk=; b=CPqAcwxpij4fwqLKj2ZSAzYCWjue7PzRxajKWcZEZTAIMD/BgGuYkzoN vHWiKLM/zqATevIc10LrIUDi/nNfPePOiJzyUmV2hSwNunIzckEehke2Z m0izBdxzcs0/ZzkQNztiHYhC1Dmkr5bXZJdY3RkkNOXpLPExBv22f077N 7rT1fmgBMne3mw0QT55ujScSLuRDtV7b/PZNBIjOqkwxysOshOBSlGfLi Z2EnwsbHAUIEhQasmhDZt4nXzq3lTDEX1k/WcQf+yQry4hHm4d+EmODWw xrjDGjqlyT+3OX5Rjwf+MzYHXfUJB8oj+tr2SReRu6RVdezxs4Nc00+jS Q==; X-CSE-ConnectionGUID: QMC0L1N4Qbqv6leolGkMQg== X-CSE-MsgGUID: pk5ihemnQuK244x4F4+9vQ== X-IronPort-AV: E=McAfee;i="6700,10204,11288"; a="34192987" X-IronPort-AV: E=Sophos;i="6.12,242,1728975600"; d="scan'208";a="34192987" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Dec 2024 05:54:23 -0800 X-CSE-ConnectionGUID: XzIOqxNAS0+ahWy+NPorqQ== X-CSE-MsgGUID: fpEOTE/MQZO8rre+yvSb7A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="102634427" Received: from ijarvine-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.245.192]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Dec 2024 05:54:19 -0800 From: =?utf-8?q?Ilpo_J=C3=A4rvinen?= To: Bjorn Helgaas , linux-pci@vger.kernel.org, =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Lukas Wunner , Jonathan Cameron , linux-kernel@vger.kernel.org Cc: Mahesh J Salgaonkar , Oliver O'Halloran , linuxppc-dev@lists.ozlabs.org, =?utf-8?q?Ilpo_J=C3=A4rvinen?= Subject: [PATCH v7 1/8] PCI: Don't expose pcie_read_tlp_log() outside of PCI subsystem Date: Tue, 17 Dec 2024 15:53:51 +0200 Message-Id: <20241217135358.9345-2-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20241217135358.9345-1-ilpo.jarvinen@linux.intel.com> References: <20241217135358.9345-1-ilpo.jarvinen@linux.intel.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 pcie_read_tlp_log() was exposed by the commit 0a5a46a6a61b ("PCI/AER: Generalize TLP Header Log reading") but this is now considered a mistake. No drivers outside of PCI subsystem should build their own diagnostic logging but should rely on PCI core doing it for them. There's currently one driver (ixgbe) doing it independently which was the initial reason why the export was added but it was decided by the PCI maintainer that it's something that should be eliminated. Remove the unwanted EXPORT of pcie_read_tlp_log() and remove it from include/linux/aer.h. Link: https://lore.kernel.org/all/20240322193011.GA701027@bhelgaas/ Signed-off-by: Ilpo Järvinen Reviewed-by: Jonathan Cameron --- drivers/pci/pci.c | 1 - drivers/pci/pci.h | 4 ++++ include/linux/aer.h | 2 -- 3 files changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 0b29ec6e8e5e..e0fdc9d10f91 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -1125,7 +1125,6 @@ int pcie_read_tlp_log(struct pci_dev *dev, int where, return 0; } -EXPORT_SYMBOL_GPL(pcie_read_tlp_log); /** * pci_restore_bars - restore a device's BAR values (e.g. after wake-up) diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 2e40fc63ba31..8a60fc9e7786 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -4,6 +4,8 @@ #include +struct pcie_tlp_log; + /* Number of possible devfns: 0.0 to 1f.7 inclusive */ #define MAX_NR_DEVFNS 256 @@ -549,6 +551,8 @@ int aer_get_device_error_info(struct pci_dev *dev, struct aer_err_info *info); void aer_print_error(struct pci_dev *dev, struct aer_err_info *info); #endif /* CONFIG_PCIEAER */ +int pcie_read_tlp_log(struct pci_dev *dev, int where, struct pcie_tlp_log *log); + #ifdef CONFIG_PCIEPORTBUS /* Cached RCEC Endpoint Association */ struct rcec_ea { diff --git a/include/linux/aer.h b/include/linux/aer.h index 4b97f38f3fcf..190a0a2061cd 100644 --- a/include/linux/aer.h +++ b/include/linux/aer.h @@ -37,8 +37,6 @@ struct aer_capability_regs { u16 uncor_err_source; }; -int pcie_read_tlp_log(struct pci_dev *dev, int where, struct pcie_tlp_log *log); - #if defined(CONFIG_PCIEAER) int pci_aer_clear_nonfatal_status(struct pci_dev *dev); int pcie_aer_is_native(struct pci_dev *dev);