From patchwork Wed Dec 25 08:29:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Le Moal X-Patchwork-Id: 13920672 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6762D14D29B for ; Wed, 25 Dec 2024 08:30:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735115455; cv=none; b=lbMOgjgvKSpJ6zI0VIx+7l2AHBWvwyePQ2dMHwIyJDgBrxyf2562w+jKdmAbVoZWsW6YsFwTOSDmclSkNuOEoQDXVTRqdgBzSqSnh1T1qlFEsm6v1A+1D2iJ5I52jkdWiKxJ/4Z356BU3yfkT4NPOb9+ud4X3Ccz9uDXcjkOYlE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735115455; c=relaxed/simple; bh=p1XyrBL8a77sSRG6UZmdKw8GtdrJgme1YzapYAfDP6Q=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=bjoNks3DnCDKD40qo8kpr0fXmD96ct7Fv1aVzdq/+G0MKRF91d4OBjo7GzAXmEQxbTMF7s8C1IdJv0ZVZPEKg1UYKj+VT0m9vWIzf/zMrDaxAVW8vAXd5RZkI1nU4tco0ootN1km5X89VSHCitxLSUT5eahVq5ikbTcGxzZBwG8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=q7vfeWxq; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="q7vfeWxq" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A3A64C4CED6; Wed, 25 Dec 2024 08:30:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1735115455; bh=p1XyrBL8a77sSRG6UZmdKw8GtdrJgme1YzapYAfDP6Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=q7vfeWxqkYOtz5d8ehoaX7FsfY44Z0D/C+1/gRF3Wufn2WiPISFzjSPSQ1VpmK6y8 ynwEn6Kwh6bS7/rTGqILJIBbcW9azr32/l9d5OP/BJejp02LO9EJGmCI8epA31nbyh AVJT0bDqa6ghOycSCr+GfJYNIpbE9G6PtJ9QzCvK7C1RoSrwCfjv7NgzXRe2XqEf9W GKXRwcp3OrRZ1PydOhuQBoS7rumI4keu1am2XIHnMAORivWQolcf2X9UFIEqmOlUzQ phYNZ9/C7vl7A3z8XSM6gj34Fh0/pbnsbfB9NQDh2kSb7Ql/twpzZP8d8H2MX7KoKe KR8ejnrBnYbNA== From: Damien Le Moal To: linux-nvme@lists.infradead.org, Christoph Hellwig , Keith Busch , Sagi Grimberg , linux-pci@vger.kernel.org, Manivannan Sadhasivam , =?utf-8?q?Krzyszt?= =?utf-8?q?of_Wilczy=C5=84ski?= , Kishon Vijay Abraham I , Bjorn Helgaas , Lorenzo Pieralisi Cc: Rick Wertenbroek , Niklas Cassel Subject: [PATCH v8 12/18] nvmet: Introduce get/set_feature controller operations Date: Wed, 25 Dec 2024 17:29:49 +0900 Message-ID: <20241225082956.96650-13-dlemoal@kernel.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241225082956.96650-1-dlemoal@kernel.org> References: <20241225082956.96650-1-dlemoal@kernel.org> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The implementation of some features cannot always be done generically by the target core code. Arbitraion and IRQ coalescing features are examples of such features: their implementation must be provided (at least partially) by the target controller driver. Introduce the set_feature() and get_feature() controller fabrics operations (in struct nvmet_fabrics_ops) to allow supporting such features. Signed-off-by: Damien Le Moal Reviewed-by: Christoph Hellwig Tested-by: Rick Wertenbroek Tested-by: Manivannan Sadhasivam --- drivers/nvme/target/nvmet.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/nvme/target/nvmet.h b/drivers/nvme/target/nvmet.h index 86bb2852a63b..8325de3382ee 100644 --- a/drivers/nvme/target/nvmet.h +++ b/drivers/nvme/target/nvmet.h @@ -416,6 +416,10 @@ struct nvmet_fabrics_ops { u16 (*create_cq)(struct nvmet_ctrl *ctrl, u16 cqid, u16 flags, u16 qsize, u64 prp1, u16 irq_vector); u16 (*delete_cq)(struct nvmet_ctrl *ctrl, u16 cqid); + u16 (*set_feature)(const struct nvmet_ctrl *ctrl, u8 feat, + void *feat_data); + u16 (*get_feature)(const struct nvmet_ctrl *ctrl, u8 feat, + void *feat_data); }; #define NVMET_MAX_INLINE_BIOVEC 8