From patchwork Sat Jan 4 04:59:45 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Le Moal X-Patchwork-Id: 13926088 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E8ECE14A4EB for ; Sat, 4 Jan 2025 05:00:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735966848; cv=none; b=f6kcxWCwD+VQEISgmPluFOlh4GfumP2i0bRJWJiCr00JFAINarXDtDK9sENk3Xu+7GH35GOt3AcJpxpuooKM/0a6/vwynkdiKpP8P28BAn6xG6S970eOH1BlwaeiUGSzsfsHggjhmIhlrvfdFLcIDjyVJF2VIQu0HypUjoZKDDM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735966848; c=relaxed/simple; bh=p1XyrBL8a77sSRG6UZmdKw8GtdrJgme1YzapYAfDP6Q=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=BQ3359y5mEhkliNL5Ls1PO3PvyVvHPA5StHwFPB5UpoEyR24Q8VJX+oQjQ3P65ZYfT89HsNM2YGv0cZ0d9IAAzkIrT1TA+wohsucywScdzJI9IZAmfWwXM+DBahLYJNAx1fBqzzE18+Oc+UojJ1ncCrzyIWEd3c8dxb45sqzm5Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=QwICOefW; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="QwICOefW" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6ADE6C4CEE1; Sat, 4 Jan 2025 05:00:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1735966847; bh=p1XyrBL8a77sSRG6UZmdKw8GtdrJgme1YzapYAfDP6Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QwICOefWbti2TmMc6FSulKUFrMX8w5PXLrouq4FTuw0Z4sYHlShcbfH4F8Tco3+YY m9Fe65xkVfWfGg+lcLJzJGvxj5bDVFoYmxBGTZzyWEytMwJbrBKOQ/k/4ezPThjvww cPg1S4RbqkZis1fVLwtDLxHeFB3b/7TfvUdVSH9Mo9IL+qarO5Turt2iWr07PDh5kT ZDFNeiR442vwkgwpWUR6nr6OQm8KZ9Ool+GxUdHmU9pvnItlj032xmkwpiGtLUY67x +ZpovLmuJRlWMJB6xV33OPJyp6qKRKk+fpfrwut4ZowHWBFH1w4jX7L8WhVg0iBuPn k8gG6RRL6BY5w== From: Damien Le Moal To: linux-nvme@lists.infradead.org, Christoph Hellwig , Keith Busch , Sagi Grimberg , linux-pci@vger.kernel.org, Manivannan Sadhasivam , =?utf-8?q?Krzyszt?= =?utf-8?q?of_Wilczy=C5=84ski?= , Kishon Vijay Abraham I , Bjorn Helgaas , Lorenzo Pieralisi Cc: Rick Wertenbroek , Niklas Cassel Subject: [PATCH v9 12/18] nvmet: Introduce get/set_feature controller operations Date: Sat, 4 Jan 2025 13:59:45 +0900 Message-ID: <20250104045951.157830-13-dlemoal@kernel.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250104045951.157830-1-dlemoal@kernel.org> References: <20250104045951.157830-1-dlemoal@kernel.org> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The implementation of some features cannot always be done generically by the target core code. Arbitraion and IRQ coalescing features are examples of such features: their implementation must be provided (at least partially) by the target controller driver. Introduce the set_feature() and get_feature() controller fabrics operations (in struct nvmet_fabrics_ops) to allow supporting such features. Signed-off-by: Damien Le Moal Reviewed-by: Christoph Hellwig Tested-by: Rick Wertenbroek Tested-by: Manivannan Sadhasivam --- drivers/nvme/target/nvmet.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/nvme/target/nvmet.h b/drivers/nvme/target/nvmet.h index 86bb2852a63b..8325de3382ee 100644 --- a/drivers/nvme/target/nvmet.h +++ b/drivers/nvme/target/nvmet.h @@ -416,6 +416,10 @@ struct nvmet_fabrics_ops { u16 (*create_cq)(struct nvmet_ctrl *ctrl, u16 cqid, u16 flags, u16 qsize, u64 prp1, u16 irq_vector); u16 (*delete_cq)(struct nvmet_ctrl *ctrl, u16 cqid); + u16 (*set_feature)(const struct nvmet_ctrl *ctrl, u8 feat, + void *feat_data); + u16 (*get_feature)(const struct nvmet_ctrl *ctrl, u8 feat, + void *feat_data); }; #define NVMET_MAX_INLINE_BIOVEC 8