diff mbox series

[v3,2/2] PCI: Adjust the position of reading the Link Control 2 register

Message ID 20250122080610.902706-3-sjiwei@163.com (mailing list archive)
State New
Delegated to: Bjorn Helgaas
Headers show
Series Fix the issue of failed speed limit lifting | expand

Commit Message

Jiwei Sun Jan. 22, 2025, 8:06 a.m. UTC 
From: Jiwei Sun <sunjw10@lenovo.com>

In the commit a89c82249c37 ("PCI: Work around PCIe link training
failures"), if the speed limit is set to 2.5 GT/s and the retraining is
successful, an attempt will be made to lift the speed limit. One condition
for lifting the speed limit is to check whether the link speed field of
the Link Control 2 register is PCI_EXP_LNKCTL2_TLS_2_5GT.

However, since the commit de9a6c8d5dbf ("PCI/bwctrl: Add
pcie_set_target_speed() to set PCIe Link Speed"), the `lnkctl2` local
variable does not undergo any changes during the speed limit setting and
retraining process. As a result, the code intended to lift the speed limit
is not executed.

To address this issue, adjust the position of the Link Control 2 register
read operation in the code and place it before its use.

Fixes: de9a6c8d5dbf ("PCI/bwctrl: Add pcie_set_target_speed() to set PCIe Link Speed")
Suggested-by: Maciej W. Rozycki <macro@orcam.me.uk>
Suggested-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Jiwei Sun <sunjw10@lenovo.com>
---
 drivers/pci/quirks.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 76f4df75b08a..c2344706ba61 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -108,13 +108,13 @@  int pcie_failed_link_retrain(struct pci_dev *dev)
 	    !pcie_cap_has_lnkctl2(dev) || !dev->link_active_reporting)
 		return ret;
 
-	pcie_capability_read_word(dev, PCI_EXP_LNKCTL2, &lnkctl2);
 	pcie_capability_read_word(dev, PCI_EXP_LNKSTA, &lnksta);
 	if (!(lnksta & PCI_EXP_LNKSTA_DLLLA) && pcie_lbms_seen(dev, lnksta)) {
-		u16 oldlnkctl2 = lnkctl2;
+		u16 oldlnkctl2;
 
 		pci_info(dev, "broken device, retraining non-functional downstream link at 2.5GT/s\n");
 
+		pcie_capability_read_word(dev, PCI_EXP_LNKCTL2, &oldlnkctl2);
 		ret = pcie_set_target_speed(dev, PCIE_SPEED_2_5GT, false);
 		if (ret) {
 			pci_info(dev, "retraining failed\n");
@@ -126,6 +126,8 @@  int pcie_failed_link_retrain(struct pci_dev *dev)
 		pcie_capability_read_word(dev, PCI_EXP_LNKSTA, &lnksta);
 	}
 
+	pcie_capability_read_word(dev, PCI_EXP_LNKCTL2, &lnkctl2);
+
 	if ((lnksta & PCI_EXP_LNKSTA_DLLLA) &&
 	    (lnkctl2 & PCI_EXP_LNKCTL2_TLS) == PCI_EXP_LNKCTL2_TLS_2_5GT &&
 	    pci_match_id(ids, dev)) {