From patchwork Fri Feb 7 09:34:59 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shuai Xue X-Patchwork-Id: 13964682 X-Patchwork-Delegate: bhelgaas@google.com Received: from out30-113.freemail.mail.aliyun.com (out30-113.freemail.mail.aliyun.com [115.124.30.113]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E8F21DE3A3; Fri, 7 Feb 2025 09:35:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=115.124.30.113 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738920913; cv=none; b=m5G8NrGl6qvd4kjGXnxiMO7ORI/U4dmzm8DDzG7zZwC0vzMb8gLhu7Mn+AscBH6FtApetld11tMBG1opaBi5nw3jX36MNp1EdsUQHAQERUNT5OjqjH2cbahgiU9749WKwOv0U16K3Dn3rJmQAmH1UPCRndXVTBE03LYmjYvPRiw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738920913; c=relaxed/simple; bh=G77TluQ4YRkzXhZDRDo4ECaG0TNzCeDj42Jddx0mYUI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=UxTGw/UeQuXFa7YrvhnPu+gI/k9pvIkWrQArWDEZowXvqofsCVPVJ0JorkBvKkqmTi5kVWEMJHypAUdLPdSJPMZqSUfUALWYlPsXih7pDNoNXeWIuhSr6Yt7jS27f2lcQT+0q2LDgJG+LxbuFE3WgC6/lCdRk1/N9V9hTnlSlGQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.alibaba.com; spf=pass smtp.mailfrom=linux.alibaba.com; dkim=pass (1024-bit key) header.d=linux.alibaba.com header.i=@linux.alibaba.com header.b=R8mQR9MR; arc=none smtp.client-ip=115.124.30.113 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.alibaba.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.alibaba.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.alibaba.com header.i=@linux.alibaba.com header.b="R8mQR9MR" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.alibaba.com; s=default; t=1738920905; h=From:To:Subject:Date:Message-ID:MIME-Version; bh=81tVXIqh6nQVPbsiUCslBs+t667EagrCKOw8cv4EGSI=; b=R8mQR9MRphySUzvzZ4YCT/KugiXBrOwjPcH0NEtt0p6UErWS2mIdfshuFtC1rYCrr7BOXpvjgb26cLMKeQ3nvbDOzyXzNWJRfWvbtoKymMY5ybZ9+PXfDtLnSd/I43bIxx7wixkyamUxIdr4NMTUrEl1hAe+WGXJXh0DkHw8giI= Received: from localhost.localdomain(mailfrom:xueshuai@linux.alibaba.com fp:SMTPD_---0WOyzNE7_1738920904 cluster:ay36) by smtp.aliyun-inc.com; Fri, 07 Feb 2025 17:35:05 +0800 From: Shuai Xue To: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, bhelgaas@google.com, kbusch@kernel.org, sathyanarayanan.kuppuswamy@linux.intel.com Cc: mahesh@linux.ibm.com, oohall@gmail.com, xueshuai@linux.alibaba.com, Jonathan.Cameron@huawei.com, terry.bowman@amd.com Subject: [PATCH v3 3/4] PCI/DPC: Run recovery on device that detected the error Date: Fri, 7 Feb 2025 17:34:59 +0800 Message-ID: <20250207093500.70885-4-xueshuai@linux.alibaba.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20250207093500.70885-1-xueshuai@linux.alibaba.com> References: <20250207093500.70885-1-xueshuai@linux.alibaba.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The current implementation of pcie_do_recovery() assumes that the recovery process is executed on the device that detected the error. However, the DPC driver currently passes the error port that experienced the DPC event to pcie_do_recovery(). Use the SOURCE ID register to correctly identify the device that detected the error. By passing this error device to pcie_do_recovery(), subsequent patches will be able to accurately access AER status of the error device. Signed-off-by: Shuai Xue --- drivers/pci/pci.h | 2 +- drivers/pci/pcie/dpc.c | 25 +++++++++++++++++++++---- drivers/pci/pcie/edr.c | 7 ++++--- 3 files changed, 26 insertions(+), 8 deletions(-) diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 01e51db8d285..870d2fbd6ff2 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -572,7 +572,7 @@ struct rcec_ea { void pci_save_dpc_state(struct pci_dev *dev); void pci_restore_dpc_state(struct pci_dev *dev); void pci_dpc_init(struct pci_dev *pdev); -void dpc_process_error(struct pci_dev *pdev); +struct pci_dev *dpc_process_error(struct pci_dev *pdev); pci_ers_result_t dpc_reset_link(struct pci_dev *pdev); bool pci_dpc_recovered(struct pci_dev *pdev); unsigned int dpc_tlp_log_len(struct pci_dev *dev); diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c index 1a54a0b657ae..a91440f3b118 100644 --- a/drivers/pci/pcie/dpc.c +++ b/drivers/pci/pcie/dpc.c @@ -253,10 +253,17 @@ static int dpc_get_aer_uncorrect_severity(struct pci_dev *dev, return 1; } -void dpc_process_error(struct pci_dev *pdev) +/** + * dpc_process_error - handle the DPC error status + * @pdev: the port that experienced the containment event + * + * Return the device that detected the error. + */ +struct pci_dev *dpc_process_error(struct pci_dev *pdev) { u16 cap = pdev->dpc_cap, status, source, reason, ext_reason; struct aer_err_info info; + struct pci_dev *err_dev; pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &status); pci_read_config_word(pdev, cap + PCI_EXP_DPC_SOURCE_ID, &source); @@ -279,6 +286,13 @@ void dpc_process_error(struct pci_dev *pdev) "software trigger" : "reserved error"); + if (reason == PCI_EXP_DPC_STATUS_TRIGGER_RSN_NFE || + reason == PCI_EXP_DPC_STATUS_TRIGGER_RSN_FE) + err_dev = pci_get_domain_bus_and_slot(pci_domain_nr(pdev->bus), + PCI_BUS_NUM(source), source & 0xff); + else + err_dev = pci_dev_get(pdev); + /* show RP PIO error detail information */ if (pdev->dpc_rp_extensions && reason == PCI_EXP_DPC_STATUS_TRIGGER_RSN_IN_EXT && @@ -291,6 +305,8 @@ void dpc_process_error(struct pci_dev *pdev) pci_aer_clear_nonfatal_status(pdev); pci_aer_clear_fatal_status(pdev); } + + return err_dev; } static void pci_clear_surpdn_errors(struct pci_dev *pdev) @@ -346,7 +362,7 @@ static bool dpc_is_surprise_removal(struct pci_dev *pdev) static irqreturn_t dpc_handler(int irq, void *context) { - struct pci_dev *err_port = context; + struct pci_dev *err_port = context, *err_dev; /* * According to PCIe r6.0 sec 6.7.6, errors are an expected side effect @@ -357,10 +373,11 @@ static irqreturn_t dpc_handler(int irq, void *context) return IRQ_HANDLED; } - dpc_process_error(err_port); + err_dev = dpc_process_error(err_port); /* We configure DPC so it only triggers on ERR_FATAL */ - pcie_do_recovery(err_port, pci_channel_io_frozen, dpc_reset_link); + pcie_do_recovery(err_dev, pci_channel_io_frozen, dpc_reset_link); + pci_dev_put(err_dev); return IRQ_HANDLED; } diff --git a/drivers/pci/pcie/edr.c b/drivers/pci/pcie/edr.c index 521fca2f40cb..088f3e188f54 100644 --- a/drivers/pci/pcie/edr.c +++ b/drivers/pci/pcie/edr.c @@ -150,7 +150,7 @@ static int acpi_send_edr_status(struct pci_dev *pdev, struct pci_dev *edev, static void edr_handle_event(acpi_handle handle, u32 event, void *data) { - struct pci_dev *pdev = data, *err_port; + struct pci_dev *pdev = data, *err_port, *err_dev; pci_ers_result_t estate = PCI_ERS_RESULT_DISCONNECT; u16 status; @@ -190,7 +190,7 @@ static void edr_handle_event(acpi_handle handle, u32 event, void *data) goto send_ost; } - dpc_process_error(err_port); + err_dev = dpc_process_error(err_port); pci_aer_raw_clear_status(err_port); /* @@ -198,7 +198,7 @@ static void edr_handle_event(acpi_handle handle, u32 event, void *data) * or ERR_NONFATAL, since the link is already down, use the FATAL * error recovery path for both cases. */ - estate = pcie_do_recovery(err_port, pci_channel_io_frozen, dpc_reset_link); + estate = pcie_do_recovery(err_dev, pci_channel_io_frozen, dpc_reset_link); send_ost: @@ -216,6 +216,7 @@ static void edr_handle_event(acpi_handle handle, u32 event, void *data) } pci_dev_put(err_port); + pci_dev_put(err_dev); } void pci_acpi_add_edr_notifier(struct pci_dev *pdev)