From patchwork Sat Feb 10 08:05:40 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Christian Zigotzky X-Patchwork-Id: 10210363 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 28B58602D8 for ; Sat, 10 Feb 2018 08:12:08 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1AFB0299DF for ; Sat, 10 Feb 2018 08:12:08 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0F395299E2; Sat, 10 Feb 2018 08:12:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, MIME_QP_LONG_LINE, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E0F75299DF for ; Sat, 10 Feb 2018 08:12:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750835AbeBJIMF (ORCPT ); Sat, 10 Feb 2018 03:12:05 -0500 Received: from mo4-p00-ob.smtp.rzone.de ([81.169.146.219]:33806 "EHLO mo4-p00-ob.smtp.rzone.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750761AbeBJIMF (ORCPT ); Sat, 10 Feb 2018 03:12:05 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; t=1518250323; s=strato-dkim-0002; d=xenosoft.de; h=To:References:Message-Id:Content-Transfer-Encoding:Cc:Date: In-Reply-To:From:Subject:Content-Type:X-RZG-CLASS-ID:X-RZG-AUTH; bh=vYC7zPZFab0MmJD+3lcNLgXqI8ppLP2ibdTGGEMop6Y=; b=HFI3gBhGDqEbd3v/WwCSKuRxiKvVw3g9ceNEl9Bns6iooHRZQQq+rDFJbWD6LOUemG 1nf5Gt4F7svlY3hlLT3JR7QTk/FsFqm3ZEqgJHQ8e5XqwTkF/zBRIDTKSB7H3eqLTPf+ EYWah6UwVXki7pd0Be8g9tSPBTIPvXj3GOXDqTWITuGznqDhljze8r0oSpZEqzVsSyO0 zNsHuSfzE98f3PtjR9+wy/6Rp0x664JjX0mnC0WCNQFktG2hlzqH572wfhzbc1NorOjo LRseX7e6h/2XTzhFT4xgA9Mk8DMKMC+9qHlc+KbT06p2IXx4YhwbzTug7Vut/ouTsUwE 9w4w== X-RZG-AUTH: :L2QefEenb+UdBJSdRCXu93KJ1bmSGnhMdmOod1DhGN0rBVhd9dFr6KxrfO5Oh7R7b2dxjrozzHJUMdkjROCea4BHJCx3qJoGUBmNtRKw X-RZG-CLASS-ID: mo00 Mime-Version: 1.0 (1.0) Subject: Re: [PATCH v1] PCI: Make PCI_SCAN_ALL_PCIE_DEVS work for Root as well as Downstream Ports From: Christian Zigotzky X-Mailer: iPhone Mail (15C202) In-Reply-To: <20171202191827.GB18780@bhelgaas-glaptop.roam.corp.google.com> Date: Sat, 10 Feb 2018 09:05:40 +0100 Cc: linux-pci@vger.kernel.org, Michael Ellerman , linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Message-Id: <33CA1586-051C-47F4-83CD-4A406FAE85F7@xenosoft.de> References: <20171202002710.17686.21340.stgit@bhelgaas-glaptop.roam.corp.google.com> <20171202191827.GB18780@bhelgaas-glaptop.roam.corp.google.com> To: Bjorn Helgaas Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hi All, The AmigaOne X1000 doesn’t boot anymore since the PCI updates. I have seen, that the PCI updates are different to the updates below. The code below works but the latest not. Is there a problem with the latest PCI updates currently? Thanks, Christian Sent from my iPhone On 2. Dec 2017, at 20:18, Bjorn Helgaas wrote: On Fri, Dec 01, 2017 at 06:27:10PM -0600, Bjorn Helgaas wrote: From: Bjorn Helgaas PCIe Downstream Ports normally have only a Device 0 below them. To optimize enumeration, we don't scan for other devices *unless* the PCI_SCAN_ALL_PCIE_DEVS flag is set by set by quirks or the "pci=pcie_scan_all" kernel parameter. Previously PCI_SCAN_ALL_PCIE_DEVS only affected scanning below Switch Downstream Ports, not Root Ports. But the "Nemo" system, also known as the AmigaOne X1000, has a PA Semi Root Port whose link leads to an AMD/ATI SB600 South Bridge. The Root Port is a PCIe device, of course, but the SB600 contains only conventional PCI devices with no visible PCIe port. Simplify and restructure only_one_child() so that we scan for all possible devices below Root Ports as well as Switch Downstream Ports when PCI_SCAN_ALL_PCIE_DEVS is set. This is enough to make Nemo work with "pci=pcie_scan_all". We would also like to add a quirk to set PCI_SCAN_ALL_PCIE_DEVS automatically on Nemo so users wouldn't have to use the "pci=pcie_scan_all" parameter, but we don't have that yet. Link: https://lkml.kernel.org/r/CAErSpo55Q8Q=5p6_+uu7ahnw+53ibVDNRXxrzRV9QnUr_9EUfw@mail.gmail.com Link: https://bugzilla.kernel.org/show_bug.cgi?id=198057 Reported-and-Tested-by: Christian Zigotzky Signed-off-by: Bjorn Helgaas Applied to pci/enumeration for v4.16. --- drivers/pci/probe.c | 25 +++++++++++++++---------- 1 file changed, 15 insertions(+), 10 deletions(-) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 14e0ea1ff38b..303c0cb0550c 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -2215,22 +2215,27 @@ static unsigned next_fn(struct pci_bus *bus, struct pci_dev *dev, unsigned fn) static int only_one_child(struct pci_bus *bus) { - struct pci_dev *parent = bus->self; + struct pci_dev *bridge = bus->self; - if (!parent || !pci_is_pcie(parent)) + /* + * Systems with unusual topologies set PCI_SCAN_ALL_PCIE_DEVS so + * we scan for all possible devices, not just Device 0. + */ + if (pci_has_flag(PCI_SCAN_ALL_PCIE_DEVS)) return 0; - if (pci_pcie_type(parent) == PCI_EXP_TYPE_ROOT_PORT) - return 1; /* - * PCIe downstream ports are bridges that normally lead to only a - * device 0, but if PCI_SCAN_ALL_PCIE_DEVS is set, scan all - * possible devices, not just device 0. See PCIe spec r3.0, - * sec 7.3.1. + * A PCIe Downstream Port normally leads to a Link with only Device + * 0 on it (PCIe spec r3.1, sec 7.3.1). As an optimization, scan + * only for Device 0 in that situation. + * + * Checking has_secondary_link is a hack to identify Downstream + * Ports because sometimes Switches are configured such that the + * PCIe Port Type labels are backwards. */ - if (parent->has_secondary_link && - !pci_has_flag(PCI_SCAN_ALL_PCIE_DEVS)) + if (bridge && pci_is_pcie(bridge) && bridge->has_secondary_link) return 1; + return 0; }