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Thu, 4 Oct 2018 16:34:30 +0000 Received: from AM0PR04MB4290.eurprd04.prod.outlook.com ([fe80::3836:6416:4ebd:34ef]) by AM0PR04MB4290.eurprd04.prod.outlook.com ([fe80::3836:6416:4ebd:34ef%3]) with mapi id 15.20.1207.022; Thu, 4 Oct 2018 16:34:30 +0000 From: Leonard Crestez To: Lucas Stach , Philipp Zabel , Lorenzo Pieralisi , Richard Zhu CC: Andrey Smirnov , Gustavo Pimentel , Jingoo Han , Bjorn Helgaas , Shawn Guo , Fabio Estevam , dl-linux-imx , "kernel@pengutronix.de" , "linux-pci@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: [PATCH v2 4/4] PCI: imx: Add PME_Turn_Off support Thread-Topic: [PATCH v2 4/4] PCI: imx: Add PME_Turn_Off support Thread-Index: AQHUXAAfuxXhw+LsYE6gE8iU25MszA== Date: Thu, 4 Oct 2018 16:34:30 +0000 Message-ID: <37d60fe2119361381a6a81f439fa1c3ad29db45e.1538670431.git.leonard.crestez@nxp.com> References: In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [95.76.156.53] x-mailer: git-send-email 2.17.1 x-clientproxiedby: DB6PR02CA0003.eurprd02.prod.outlook.com (2603:10a6:6:15::16) To AM0PR04MB4290.eurprd04.prod.outlook.com (2603:10a6:208:67::17) authentication-results: spf=none (sender IP is ) smtp.mailfrom=leonard.crestez@nxp.com; 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received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: KXPGTBxcpyNaDCpVCzrQxQP3Xd9xd6p+R7jIdwfz3FhTGtjqRFhBnF8EWRDNj9kY3tCiTuXZa7B/9aLRX8xvGgjhO41bH8uf1tADKU6fSEjaQne/Xv5fX8KJedUwgqvH0bZ90W8DgJshvOBBrzg43vMD5SYfK7Ou1dTKE2dSvE8pOiCQmwxoWQopv+Bv2bu074h8EXxW1/9UbTHf6hhQ3RjAfd7VKKfKaVCUS1RPpVWH2etCi6PCE/ZHjA/86pw69gZvC76ttBwTMv5WODwi3pygHpvk10dJPNu0H2HofibMu40ne6EkVmkUsjmuXFZs1bcICe+StdRwCPjhlGV4KFR+0Jlg8YQgqEZYbwyx8YU= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 6a17609b-d0a5-4356-1e5c-08d62a1741f9 X-MS-Exchange-CrossTenant-originalarrivaltime: 04 Oct 2018 16:34:30.2135 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB5266 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When the root complex suspends it must send a PME_Turn_Off TLP. Implement this by asserting the "turnoff" reset. On imx7d this functionality is part of the SRC and exposed through the linux reset-controller subsystem. On imx6 equivalent bits are in the IOMUXC GPR area which the imx6-pcie driver accesses directly. This is only for imx7d right now but it's deliberately implemented as an optional reset, ignoring the chip variant: * Older dtbs won't have this reset so it will be ignored. * Future chips might also expose this as a reset controller. For example imx8m (not yet supported) has the exact same PCIE_CTRL_APPS_TURNOFF bit in the same location. Signed-off-by: Leonard Crestez Reviewed-by: Lucas Stach --- drivers/pci/controller/dwc/pci-imx6.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 6ba16fd1373c..2bf80f1ad852 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -50,10 +50,11 @@ struct imx6_pcie { struct clk *pcie_inbound_axi; struct clk *pcie; struct regmap *iomuxc_gpr; struct reset_control *pciephy_reset; struct reset_control *apps_reset; + struct reset_control *turnoff_reset; enum imx6_pcie_variants variant; u32 tx_deemph_gen1; u32 tx_deemph_gen2_3p5db; u32 tx_deemph_gen2_6db; u32 tx_swing_full; @@ -812,10 +813,25 @@ static void imx6_pcie_ltssm_disable(struct device *dev) default: dev_err(dev, "ltssm_disable not supported\n"); } } +static void imx6_pcie_pm_turnoff(struct imx6_pcie *imx6_pcie) +{ + reset_control_assert(imx6_pcie->turnoff_reset); + reset_control_deassert(imx6_pcie->turnoff_reset); + + /* + * Components with an upstream port must respond to + * PME_Turn_Off with PME_TO_Ack but we can't check. + * + * The standard recommends a 1-10ms timeout after which to + * proceed anyway as if acks were received. + */ + usleep_range(1000, 10000); +} + static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie) { clk_disable_unprepare(imx6_pcie->pcie); clk_disable_unprepare(imx6_pcie->pcie_phy); clk_disable_unprepare(imx6_pcie->pcie_bus); @@ -832,10 +848,11 @@ static int imx6_pcie_suspend_noirq(struct device *dev) struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev); if (imx6_pcie->variant != IMX7D) return 0; + imx6_pcie_pm_turnoff(imx6_pcie); imx6_pcie_clk_disable(imx6_pcie); imx6_pcie_ltssm_disable(dev); return 0; } @@ -959,10 +976,17 @@ static int imx6_pcie_probe(struct platform_device *pdev) break; default: break; } + /* Grab turnoff reset */ + imx6_pcie->turnoff_reset = devm_reset_control_get_optional_exclusive(dev, "turnoff"); + if (IS_ERR(imx6_pcie->turnoff_reset)) { + dev_err(dev, "Failed to get TURNOFF reset control\n"); + return PTR_ERR(imx6_pcie->turnoff_reset); + } + /* Grab GPR config register range */ imx6_pcie->iomuxc_gpr = syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr"); if (IS_ERR(imx6_pcie->iomuxc_gpr)) { dev_err(dev, "unable to find iomuxc registers\n");