From patchwork Wed May 13 03:15:38 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kenji Kaneshige X-Patchwork-Id: 23457 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n4D3GkhF018268 for ; Wed, 13 May 2009 03:16:47 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759791AbZEMDQA (ORCPT ); Tue, 12 May 2009 23:16:00 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1759890AbZEMDP7 (ORCPT ); Tue, 12 May 2009 23:15:59 -0400 Received: from fgwmail6.fujitsu.co.jp ([192.51.44.36]:40309 "EHLO fgwmail6.fujitsu.co.jp" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759863AbZEMDP6 (ORCPT ); Tue, 12 May 2009 23:15:58 -0400 Received: from mt1.gw.fujitsu.co.jp ([10.0.50.74]) by fgwmail6.fujitsu.co.jp (Fujitsu Gateway) with ESMTP id n4D3FwGX029237 for (envelope-from kaneshige.kenji@jp.fujitsu.com); Wed, 13 May 2009 12:15:59 +0900 Received: from smail (m4 [127.0.0.1]) by outgoing.m4.gw.fujitsu.co.jp (Postfix) with ESMTP id 77B4A45DE52 for ; Wed, 13 May 2009 12:15:58 +0900 (JST) Received: from s4.gw.fujitsu.co.jp (s4.gw.fujitsu.co.jp [10.0.50.94]) by m4.gw.fujitsu.co.jp (Postfix) with ESMTP id 4711E45DE51 for ; Wed, 13 May 2009 12:15:58 +0900 (JST) Received: from s4.gw.fujitsu.co.jp (localhost.localdomain [127.0.0.1]) by s4.gw.fujitsu.co.jp (Postfix) with ESMTP id 21EAD1DB8045 for ; Wed, 13 May 2009 12:15:58 +0900 (JST) Received: from m108.s.css.fujitsu.com (m108.s.css.fujitsu.com [10.249.87.108]) by s4.gw.fujitsu.co.jp (Postfix) with ESMTP id C398F1DB8040 for ; Wed, 13 May 2009 12:15:57 +0900 (JST) Received: from m108.css.fujitsu.com (m108 [127.0.0.1]) by m108.s.css.fujitsu.com (Postfix) with ESMTP id 9EF8D42805F; Wed, 13 May 2009 12:15:57 +0900 (JST) Received: from [127.0.0.1] (unknown [10.124.100.137]) by m108.s.css.fujitsu.com (Postfix) with ESMTP id 2F242428057; Wed, 13 May 2009 12:15:57 +0900 (JST) Message-ID: <4A0A3B5A.7030302@jp.fujitsu.com> Date: Wed, 13 May 2009 12:15:38 +0900 From: Kenji Kaneshige User-Agent: Thunderbird 2.0.0.21 (Windows/20090302) MIME-Version: 1.0 To: "linux-pci@vger.kernel.org" , Jesse Barnes CC: "Zhang, Yanmin" , "Li, Shaohua" Subject: [PATCH 4/14] PCI ASPM: cleanup clkpm state in struct pcie_link_state References: <4A0A3A24.5030501@jp.fujitsu.com> In-Reply-To: <4A0A3A24.5030501@jp.fujitsu.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The "clk_pm_capable", "clk_pm_enable" and "bios_clk_state" fields in the struct pcie_link_state only take 1-bit value. So those fields don't need to be defined as unsigned int. This patch makes those fields 1-bit, and cleans up some related code. Signed-off-by: Kenji Kaneshige --- drivers/pci/pcie/aspm.c | 37 ++++++++++++++++++------------------- 1 file changed, 18 insertions(+), 19 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Index: 20090508/drivers/pci/pcie/aspm.c =================================================================== --- 20090508.orig/drivers/pci/pcie/aspm.c +++ 20090508/drivers/pci/pcie/aspm.c @@ -45,14 +45,13 @@ struct pcie_link_state { u32 aspm_enabled:2; /* Enabled ASPM state */ u32 aspm_default:2; /* Default ASPM state by BIOS */ + /* Clock PM state */ + u32 clkpm_capable:1; /* Clock PM capable? */ + u32 clkpm_enabled:1; /* Current Clock PM state */ + u32 clkpm_default:1; /* Default Clock PM state by BIOS */ + /* Latencies */ struct aspm_latency latency; /* Exit latency */ - - /* Clock PM state*/ - unsigned int clk_pm_capable; - unsigned int clk_pm_enabled; - unsigned int bios_clk_state; - /* * Endpoint acceptable latencies. A pcie downstream port only * has one slot under it, so at most there are 8 functions. @@ -105,7 +104,7 @@ static int policy_to_clkpm_state(struct /* Disable Clock PM */ return 1; case POLICY_DEFAULT: - return link_state->bios_clk_state; + return link_state->clkpm_default; } return 0; } @@ -128,7 +127,7 @@ static void pcie_set_clock_pm(struct pci reg16 &= ~PCI_EXP_LNKCTL_CLKREQ_EN; pci_write_config_word(child_dev, pos + PCI_EXP_LNKCTL, reg16); } - link_state->clk_pm_enabled = !!enable; + link_state->clkpm_enabled = !!enable; } static void pcie_check_clock_pm(struct pci_dev *pdev, int blacklist) @@ -155,13 +154,13 @@ static void pcie_check_clock_pm(struct p if (!(reg16 & PCI_EXP_LNKCTL_CLKREQ_EN)) enabled = 0; } - link_state->clk_pm_enabled = enabled; - link_state->bios_clk_state = enabled; + link_state->clkpm_enabled = enabled; + link_state->clkpm_default = enabled; if (!blacklist) { - link_state->clk_pm_capable = capable; + link_state->clkpm_capable = capable; pcie_set_clock_pm(pdev, policy_to_clkpm_state(pdev)); } else { - link_state->clk_pm_capable = 0; + link_state->clkpm_capable = 0; pcie_set_clock_pm(pdev, 0); } } @@ -770,10 +769,10 @@ void pci_disable_link_state(struct pci_d link_state = parent->link_state; link_state->aspm_support &= ~state; if (state & PCIE_LINK_STATE_CLKPM) - link_state->clk_pm_capable = 0; + link_state->clkpm_capable = 0; __pcie_aspm_configure_link_state(parent, link_state->aspm_enabled); - if (!link_state->clk_pm_capable && link_state->clk_pm_enabled) + if (!link_state->clkpm_capable && link_state->clkpm_enabled) pcie_set_clock_pm(parent, 0); mutex_unlock(&aspm_lock); up_read(&pci_bus_sem); @@ -801,8 +800,8 @@ static int pcie_aspm_set_policy(const ch pdev = link_state->pdev; __pcie_aspm_configure_link_state(pdev, policy_to_aspm_state(pdev)); - if (link_state->clk_pm_capable && - link_state->clk_pm_enabled != policy_to_clkpm_state(pdev)) + if (link_state->clkpm_capable && + link_state->clkpm_enabled != policy_to_clkpm_state(pdev)) pcie_set_clock_pm(pdev, policy_to_clkpm_state(pdev)); } @@ -863,7 +862,7 @@ static ssize_t clk_ctl_show(struct devic struct pci_dev *pci_device = to_pci_dev(dev); struct pcie_link_state *link_state = pci_device->link_state; - return sprintf(buf, "%d\n", link_state->clk_pm_enabled); + return sprintf(buf, "%d\n", link_state->clkpm_enabled); } static ssize_t clk_ctl_store(struct device *dev, @@ -902,7 +901,7 @@ void pcie_aspm_create_sysfs_dev_files(st if (link_state->aspm_support) sysfs_add_file_to_group(&pdev->dev.kobj, &dev_attr_link_state.attr, power_group); - if (link_state->clk_pm_capable) + if (link_state->clkpm_capable) sysfs_add_file_to_group(&pdev->dev.kobj, &dev_attr_clk_ctl.attr, power_group); } @@ -918,7 +917,7 @@ void pcie_aspm_remove_sysfs_dev_files(st if (link_state->aspm_support) sysfs_remove_file_from_group(&pdev->dev.kobj, &dev_attr_link_state.attr, power_group); - if (link_state->clk_pm_capable) + if (link_state->clkpm_capable) sysfs_remove_file_from_group(&pdev->dev.kobj, &dev_attr_clk_ctl.attr, power_group); }