From patchwork Thu Aug 6 02:36:52 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hidetoshi Seto X-Patchwork-Id: 39509 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n762bqZO027722 for ; Thu, 6 Aug 2009 02:37:52 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752152AbZHFChO (ORCPT ); Wed, 5 Aug 2009 22:37:14 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1753274AbZHFChO (ORCPT ); Wed, 5 Aug 2009 22:37:14 -0400 Received: from fgwmail5.fujitsu.co.jp ([192.51.44.35]:60189 "EHLO fgwmail5.fujitsu.co.jp" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752152AbZHFChM (ORCPT ); Wed, 5 Aug 2009 22:37:12 -0400 Received: from m6.gw.fujitsu.co.jp ([10.0.50.76]) by fgwmail5.fujitsu.co.jp (Fujitsu Gateway) with ESMTP id n762bCiG023205 for (envelope-from seto.hidetoshi@jp.fujitsu.com); Thu, 6 Aug 2009 11:37:13 +0900 Received: from smail (m6 [127.0.0.1]) by outgoing.m6.gw.fujitsu.co.jp (Postfix) with ESMTP id 9A66F45DE50 for ; Thu, 6 Aug 2009 11:37:12 +0900 (JST) Received: from s6.gw.fujitsu.co.jp (s6.gw.fujitsu.co.jp [10.0.50.96]) by m6.gw.fujitsu.co.jp (Postfix) with ESMTP id 780E845DE52 for ; Thu, 6 Aug 2009 11:37:12 +0900 (JST) Received: from s6.gw.fujitsu.co.jp (localhost.localdomain [127.0.0.1]) by s6.gw.fujitsu.co.jp (Postfix) with ESMTP id 4235AE0800D for ; Thu, 6 Aug 2009 11:37:12 +0900 (JST) Received: from m106.s.css.fujitsu.com (m106.s.css.fujitsu.com [10.249.87.106]) by s6.gw.fujitsu.co.jp (Postfix) with ESMTP id 6752DE08002 for ; Thu, 6 Aug 2009 11:37:11 +0900 (JST) Received: from m106.css.fujitsu.com (m106 [127.0.0.1]) by m106.s.css.fujitsu.com (Postfix) with ESMTP id 302545B8863; Thu, 6 Aug 2009 11:37:11 +0900 (JST) Received: from [127.0.0.1] (unknown [10.124.100.141]) by m106.s.css.fujitsu.com (Postfix) with ESMTP id 78FD65B87AF; Thu, 6 Aug 2009 11:37:10 +0900 (JST) X-SecurityPolicyCheck-FJ: OK by FujitsuOutboundMailChecker v1.3.1 Received: from FMVDA2A041[10.124.100.141] by FMVDA2A041 (FujitsuOutboundMailChecker v1.3.1/9992[10.124.100.141]); Thu, 06 Aug 2009 11:37:02 +0900 (JST) Message-ID: <4A7A41C4.1020201@jp.fujitsu.com> Date: Thu, 06 Aug 2009 11:36:52 +0900 From: Hidetoshi Seto User-Agent: Thunderbird 2.0.0.22 (Windows/20090605) MIME-Version: 1.0 To: linux-pci@vger.kernel.org CC: Jesse Barnes , Matthew Wilcox Subject: [PATCH 8/8] pci/msi: Style cleanups References: <4A7A4036.9020007@jp.fujitsu.com> In-Reply-To: <4A7A4036.9020007@jp.fujitsu.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Cleanups (nearly based on checkpatch). Before: total: 11 errors, 2 warnings, 0 checks, 842 lines checked After: total: 0 errors, 0 warnings, 0 checks, 842 lines checked Signed-off-by: Hidetoshi Seto --- drivers/pci/msi.c | 42 +++++++++++++++++++++--------------------- 1 files changed, 21 insertions(+), 21 deletions(-) diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index 14159cf..625e9cd 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c @@ -16,9 +16,8 @@ #include #include #include - -#include -#include +#include +#include #include "pci.h" #include "msi.h" @@ -390,7 +389,7 @@ static int msi_capability_init(struct pci_dev *dev, int nvec) u16 control; unsigned mask; - pos = pci_find_capability(dev, PCI_CAP_ID_MSI); + pos = pci_find_capability(dev, PCI_CAP_ID_MSI); msi_set_enable(dev, pos, 0); /* Disable MSI during set up */ pci_read_config_word(dev, msi_control_reg(pos), &control); @@ -399,12 +398,12 @@ static int msi_capability_init(struct pci_dev *dev, int nvec) if (!entry) return -ENOMEM; - entry->msi_attrib.is_msix = 0; - entry->msi_attrib.is_64 = is_64bit_address(control); - entry->msi_attrib.entry_nr = 0; - entry->msi_attrib.maskbit = is_mask_bit_support(control); - entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */ - entry->msi_attrib.pos = pos; + entry->msi_attrib.is_msix = 0; + entry->msi_attrib.is_64 = is_64bit_address(control); + entry->msi_attrib.entry_nr = 0; + entry->msi_attrib.maskbit = is_mask_bit_support(control); + entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */ + entry->msi_attrib.pos = pos; entry->mask_pos = msi_mask_reg(pos, entry->msi_attrib.is_64); /* All MSIs are unmasked by default, Mask them all */ @@ -513,7 +512,7 @@ static int msix_capability_init(struct pci_dev *dev, u16 control; void __iomem *base; - pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); + pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control); /* Ensure MSI-X is disabled while it is set up */ @@ -584,7 +583,7 @@ error: * to determine if MSI/-X are supported for the device. If MSI/-X is * supported return 0, else return an error code. **/ -static int pci_msi_check_device(struct pci_dev* dev, int nvec, int type) +static int pci_msi_check_device(struct pci_dev *dev, int nvec, int type) { struct pci_bus *bus; int ret; @@ -601,7 +600,8 @@ static int pci_msi_check_device(struct pci_dev* dev, int nvec, int type) if (nvec < 1) return -ERANGE; - /* Any bridge which does NOT route MSI transactions from it's + /* + * Any bridge which does NOT route MSI transactions from it's * secondary bus to it's primary bus must set NO_MSI flag on * the secondary pci_bus. * We expect only arch-specific PCI host bus controller driver @@ -693,7 +693,7 @@ void pci_msi_shutdown(struct pci_dev *dev) dev->irq = desc->msi_attrib.default_irq; } -void pci_disable_msi(struct pci_dev* dev) +void pci_disable_msi(struct pci_dev *dev) { if (!pci_msi_enable || !dev || !dev->msi_enabled) return; @@ -735,13 +735,13 @@ int pci_msix_table_size(struct pci_dev *dev) * of irqs or MSI-X vectors available. Driver should use the returned value to * re-send its request. **/ -int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec) +int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec) { int status, nr_entries; int i, j; if (!entries) - return -EINVAL; + return -EINVAL; status = pci_msi_check_device(dev, nvec, PCI_CAP_ID_MSIX); if (status) @@ -763,7 +763,7 @@ int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec) WARN_ON(!!dev->msix_enabled); /* Check whether driver already requested for MSI irq */ - if (dev->msi_enabled) { + if (dev->msi_enabled) { dev_info(&dev->dev, "can't enable MSI-X " "(MSI IRQ already assigned)\n"); return -EINVAL; @@ -773,7 +773,7 @@ int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec) } EXPORT_SYMBOL(pci_enable_msix); -void pci_msix_shutdown(struct pci_dev* dev) +void pci_msix_shutdown(struct pci_dev *dev) { struct msi_desc *entry; @@ -791,7 +791,7 @@ void pci_msix_shutdown(struct pci_dev* dev) dev->msix_enabled = 0; } -void pci_disable_msix(struct pci_dev* dev) +void pci_disable_msix(struct pci_dev *dev) { if (!pci_msi_enable || !dev || !dev->msix_enabled) return; @@ -810,10 +810,10 @@ EXPORT_SYMBOL(pci_disable_msix); * allocated for this device function, are reclaimed to unused state, * which may be used later on. **/ -void msi_remove_pci_irq_vectors(struct pci_dev* dev) +void msi_remove_pci_irq_vectors(struct pci_dev *dev) { if (!pci_msi_enable || !dev) - return; + return; if (dev->msi_enabled || dev->msix_enabled) free_msi_irqs(dev);