From patchwork Fri Aug 21 03:48:49 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hidetoshi Seto X-Patchwork-Id: 43047 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n7L3lwJ3017173 for ; Fri, 21 Aug 2009 03:49:18 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754666AbZHUDtP (ORCPT ); Thu, 20 Aug 2009 23:49:15 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1754671AbZHUDtP (ORCPT ); Thu, 20 Aug 2009 23:49:15 -0400 Received: from fgwmail7.fujitsu.co.jp ([192.51.44.37]:34825 "EHLO fgwmail7.fujitsu.co.jp" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754666AbZHUDtP (ORCPT ); Thu, 20 Aug 2009 23:49:15 -0400 Received: from m2.gw.fujitsu.co.jp ([10.0.50.72]) by fgwmail7.fujitsu.co.jp (Fujitsu Gateway) with ESMTP id n7L3nG1L026330 for (envelope-from seto.hidetoshi@jp.fujitsu.com); Fri, 21 Aug 2009 12:49:16 +0900 Received: from smail (m2 [127.0.0.1]) by outgoing.m2.gw.fujitsu.co.jp (Postfix) with ESMTP id 5750545DE51 for ; Fri, 21 Aug 2009 12:49:16 +0900 (JST) Received: from s2.gw.fujitsu.co.jp (s2.gw.fujitsu.co.jp [10.0.50.92]) by m2.gw.fujitsu.co.jp (Postfix) with ESMTP id 2941C45DE4E for ; Fri, 21 Aug 2009 12:49:16 +0900 (JST) Received: from s2.gw.fujitsu.co.jp (localhost.localdomain [127.0.0.1]) by s2.gw.fujitsu.co.jp (Postfix) with ESMTP id 0D6841DB8038 for ; Fri, 21 Aug 2009 12:49:16 +0900 (JST) Received: from m107.s.css.fujitsu.com (m107.s.css.fujitsu.com [10.249.87.107]) by s2.gw.fujitsu.co.jp (Postfix) with ESMTP id AEF471DB803C for ; Fri, 21 Aug 2009 12:49:15 +0900 (JST) Received: from m107.css.fujitsu.com (m107 [127.0.0.1]) by m107.s.css.fujitsu.com (Postfix) with ESMTP id 887B767000A; Fri, 21 Aug 2009 12:49:15 +0900 (JST) Received: from [127.0.0.1] (unknown [10.124.100.141]) by m107.s.css.fujitsu.com (Postfix) with ESMTP id 30623670007; Fri, 21 Aug 2009 12:49:15 +0900 (JST) X-SecurityPolicyCheck-FJ: OK by FujitsuOutboundMailChecker v1.3.1 Received: from FMVDA2A041[10.124.100.141] by FMVDA2A041 (FujitsuOutboundMailChecker v1.3.1/9992[10.124.100.141]); Fri, 21 Aug 2009 12:48:53 +0900 (JST) Message-ID: <4A8E1921.5090500@jp.fujitsu.com> Date: Fri, 21 Aug 2009 12:48:49 +0900 From: Hidetoshi Seto User-Agent: Thunderbird 2.0.0.23 (Windows/20090812) MIME-Version: 1.0 To: linux-pci@vger.kernel.org CC: Jesse Barnes Subject: [PATCH 8/8] pcie, aer: report multiple/first error on a device References: <4A8E169F.3080700@jp.fujitsu.com> In-Reply-To: <4A8E169F.3080700@jp.fujitsu.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Multiple bits might be set in the Uncorrectable Error Status register. But aer_print_error_source() only report a error of the lowest bit set in the error status register. So it is better to print strings for all bits unmasked and set. And check First Error Pointer to mark the error occurred first. This FEP is not valid when the corresponding bit of the Uncorrectable Error Status register is not set, or unimplemented or undefined. Signed-off-by: Hidetoshi Seto Reviewed-by: Andrew Patterson --- drivers/pci/pcie/aer/aerdrv.h | 1 + drivers/pci/pcie/aer/aerdrv_core.c | 4 ++++ drivers/pci/pcie/aer/aerdrv_errprint.c | 8 ++++---- 3 files changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/pci/pcie/aer/aerdrv.h b/drivers/pci/pcie/aer/aerdrv.h index 0db530d..436bf79 100644 --- a/drivers/pci/pcie/aer/aerdrv.h +++ b/drivers/pci/pcie/aer/aerdrv.h @@ -61,6 +61,7 @@ struct aer_err_info { u16 id; int severity; /* 0:NONFATAL | 1:FATAL | 2:COR */ int flags; + int first; unsigned int status; /* COR/UNCOR Error Status */ unsigned int mask; /* COR/UNCOR Error Mask */ struct header_log_regs tlp; /* TLP Header */ diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c index 38b3933..995644e 100644 --- a/drivers/pci/pcie/aer/aerdrv_core.c +++ b/drivers/pci/pcie/aer/aerdrv_core.c @@ -727,6 +727,10 @@ static int get_device_error_info(struct pci_dev *dev, struct aer_err_info *info) if (!(info->status & ~info->mask)) return AER_UNSUCCESS; + /* Get First Error Pointer */ + pci_read_config_dword(dev, pos + PCI_ERR_CAP, &info->first); + info->first = PCI_ERR_CAP_FEP(info->first); + if (info->status & AER_LOG_TLP_MASKS) { info->flags |= AER_TLP_HEADER_VALID_FLAG; pci_read_config_dword(dev, diff --git a/drivers/pci/pcie/aer/aerdrv_errprint.c b/drivers/pci/pcie/aer/aerdrv_errprint.c index 919c2c0..b6303fc 100644 --- a/drivers/pci/pcie/aer/aerdrv_errprint.c +++ b/drivers/pci/pcie/aer/aerdrv_errprint.c @@ -169,11 +169,11 @@ static void aer_print_error_source(struct aer_err_info *info) errmsg = aer_uncorrectable_error_string[i]; if (errmsg) - AER_PR(info, "%s\t:\n", errmsg); + AER_PR(info, "%s\t: %s\n", errmsg, + info->first == i ? "First" : ""); else - AER_PR(info, "Unknown Error Bit %2d \t:\n", i); - - break; + AER_PR(info, "Unknown Error Bit %2d \t: %s\n", + i, info->first == i ? "First" : ""); } }