From patchwork Wed Apr 7 07:26:51 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hidetoshi Seto X-Patchwork-Id: 90946 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o377QFIa012454 for ; Wed, 7 Apr 2010 07:27:06 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757455Ab0DGH1F (ORCPT ); Wed, 7 Apr 2010 03:27:05 -0400 Received: from fgwmail7.fujitsu.co.jp ([192.51.44.37]:50618 "EHLO fgwmail7.fujitsu.co.jp" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757209Ab0DGH1D (ORCPT ); Wed, 7 Apr 2010 03:27:03 -0400 Received: from m4.gw.fujitsu.co.jp ([10.0.50.74]) by fgwmail7.fujitsu.co.jp (Fujitsu Gateway) with ESMTP id o377R17G028497 for (envelope-from seto.hidetoshi@jp.fujitsu.com); Wed, 7 Apr 2010 16:27:02 +0900 Received: from smail (m4 [127.0.0.1]) by outgoing.m4.gw.fujitsu.co.jp (Postfix) with ESMTP id B236345DE6E for ; Wed, 7 Apr 2010 16:27:01 +0900 (JST) Received: from s4.gw.fujitsu.co.jp (s4.gw.fujitsu.co.jp [10.0.50.94]) by m4.gw.fujitsu.co.jp (Postfix) with ESMTP id 8FE8345DE60 for ; Wed, 7 Apr 2010 16:27:01 +0900 (JST) Received: from s4.gw.fujitsu.co.jp (localhost.localdomain [127.0.0.1]) by s4.gw.fujitsu.co.jp (Postfix) with ESMTP id 6DE99E18001 for ; Wed, 7 Apr 2010 16:27:01 +0900 (JST) Received: from m107.s.css.fujitsu.com (m107.s.css.fujitsu.com [10.249.87.107]) by s4.gw.fujitsu.co.jp (Postfix) with ESMTP id 17E1EE18006 for ; Wed, 7 Apr 2010 16:26:58 +0900 (JST) Received: from m107.css.fujitsu.com (m107 [127.0.0.1]) by m107.s.css.fujitsu.com (Postfix) with ESMTP id B5FA267000A; Wed, 7 Apr 2010 16:26:57 +0900 (JST) Received: from [127.0.0.1] (unknown [10.124.100.141]) by m107.s.css.fujitsu.com (Postfix) with ESMTP id 405E7670009; Wed, 7 Apr 2010 16:26:57 +0900 (JST) X-SecurityPolicyCheck-FJ: OK by FujitsuOutboundMailChecker v1.3.1 Received: from FMVDA2A041[10.124.100.141] by FMVDA2A041 (FujitsuOutboundMailChecker v1.3.1/9992[10.124.100.141]); Wed, 07 Apr 2010 16:26:56 +0900 (JST) Message-ID: <4BBC33BB.3030902@jp.fujitsu.com> Date: Wed, 07 Apr 2010 16:26:51 +0900 From: Hidetoshi Seto User-Agent: Mozilla/5.0 (Windows; U; Windows NT 6.0; ja; rv:1.9.1.9) Gecko/20100317 Thunderbird/3.0.4 MIME-Version: 1.0 To: linux-pci@vger.kernel.org CC: Jesse Barnes Subject: [PATCH 10/22] aerdrv: redefine PCI_ERR_ROOT_*_SRC References: <4BBC30C2.7010300@jp.fujitsu.com> In-Reply-To: <4BBC30C2.7010300@jp.fujitsu.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Wed, 07 Apr 2010 07:27:06 +0000 (UTC) diff --git a/drivers/pci/pcie/aer/aer_inject.c b/drivers/pci/pcie/aer/aer_inject.c index 223052b..86265b2 100644 --- a/drivers/pci/pcie/aer/aer_inject.c +++ b/drivers/pci/pcie/aer/aer_inject.c @@ -167,7 +167,7 @@ static u32 *find_pci_config_dword(struct aer_error *err, int where, target = &err->root_status; rw1cs = 1; break; - case PCI_ERR_ROOT_COR_SRC: + case PCI_ERR_ROOT_ERR_SRC: target = &err->source_id; break; } diff --git a/drivers/pci/pcie/aer/aerdrv.c b/drivers/pci/pcie/aer/aerdrv.c index 12d6a50..e15bfa2 100644 --- a/drivers/pci/pcie/aer/aerdrv.c +++ b/drivers/pci/pcie/aer/aerdrv.c @@ -102,7 +102,7 @@ irqreturn_t aer_irq(int irq, void *context) } /* Read error source and clear error status */ - pci_read_config_dword(pdev->port, pos + PCI_ERR_ROOT_COR_SRC, &id); + pci_read_config_dword(pdev->port, pos + PCI_ERR_ROOT_ERR_SRC, &id); pci_write_config_dword(pdev->port, pos + PCI_ERR_ROOT_STATUS, status); /* Store error source for later DPC handler */ diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h index 9f2ad0a..4ee9b77 100644 --- a/include/linux/pci_regs.h +++ b/include/linux/pci_regs.h @@ -562,8 +562,9 @@ #define PCI_ERR_ROOT_FIRST_FATAL 0x00000010 /* First Fatal */ #define PCI_ERR_ROOT_NONFATAL_RCV 0x00000020 /* Non-Fatal Received */ #define PCI_ERR_ROOT_FATAL_RCV 0x00000040 /* Fatal Received */ -#define PCI_ERR_ROOT_COR_SRC 52 -#define PCI_ERR_ROOT_SRC 54 +#define PCI_ERR_ROOT_ERR_SRC 52 /* Error Source Identification */ +#define PCI_ERR_ROOT_COR_SRC 52 /* first correctable */ +#define PCI_ERR_ROOT_UNC_SRC 54 /* first uncorrectable */ /* Virtual Channel */ #define PCI_VC_PORT_REG1 4