From patchwork Wed Nov 13 13:48:12 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Bj=C3=B8rn_Mork?= X-Patchwork-Id: 3178171 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 7AEA1C045B for ; Wed, 13 Nov 2013 13:48:39 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8B14820621 for ; Wed, 13 Nov 2013 13:48:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 84BE12061A for ; Wed, 13 Nov 2013 13:48:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756878Ab3KMNsb (ORCPT ); Wed, 13 Nov 2013 08:48:31 -0500 Received: from canardo.mork.no ([148.122.252.1]:58433 "EHLO canardo.mork.no" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756664Ab3KMNsa (ORCPT ); Wed, 13 Nov 2013 08:48:30 -0500 Received: from nemi.mork.no (nemi.mork.no [IPv6:2001:4620:9:2:e8b:fdff:fe08:971]) (authenticated bits=0) by canardo.mork.no (8.14.4/8.14.4) with ESMTP id rADDmCkU025637 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES128-SHA bits=128 verify=NOT); Wed, 13 Nov 2013 14:48:13 +0100 Received: from bjorn by nemi.mork.no with local (Exim 4.80) (envelope-from ) id 1Vgank-0002eM-Le; Wed, 13 Nov 2013 14:48:12 +0100 From: =?utf-8?Q?Bj=C3=B8rn_Mork?= To: "Grumbach\, Emmanuel" Cc: Bjorn Helgaas , Emmanuel Grumbach , wzyboy , "ilw\@linux.intel.com" , "linux-wireless\@vger.kernel.org" , "linux-pci\@vger.kernel.org" Subject: Re: [Ilw] Intel Wireless 7260 hardware timed out randomly Organization: m References: <0BA3FCBA62E2DC44AF3030971E174FB301DEA052@HASMSX103.ger.corp.intel.com> <0BA3FCBA62E2DC44AF3030971E174FB301DEA097@HASMSX103.ger.corp.intel.com> <527A8166.6000701@gmail.com> <20131111224439.GA30638@google.com> <0BA3FCBA62E2DC44AF3030971E174FB301DF044C@HASMSX103.ger.corp.intel.com> <0BA3FCBA62E2DC44AF3030971E174FB301DF0865@HASMSX103.ger.corp.intel.com> <52828364.6080103@gmail.com> <0BA3FCBA62E2DC44AF3030971E174FB301E00262@HASMSX103.ger.corp.intel.com> Date: Wed, 13 Nov 2013 14:48:12 +0100 In-Reply-To: <0BA3FCBA62E2DC44AF3030971E174FB301E00262@HASMSX103.ger.corp.intel.com> (Emmanuel Grumbach's message of "Wed, 13 Nov 2013 12:13:31 +0000") Message-ID: <87k3gco1k3.fsf@nemi.mork.no> User-Agent: Gnus/5.11002 (No Gnus v0.20) Emacs/23.4 (gnu/linux) MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.97.8 at canardo X-Virus-Status: Clean Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_TVD_MIME_EPI, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP "Grumbach, Emmanuel" writes: > Ok - so I have now the complete picture. > This device was designed before PCI-SIG gave an ID to L1 PM Substates, > so Intel had to use the L1 PM Substate as a Vendor Define whose ID is > 0xCAFE. Layout is the same as defined now in PCI-SIG (page 21 in > http://www.pcisig.com/specifications/pciexpress/specifications/ECN_L1_PM_Substates_with_CLKREQ_31_May_2013_Rev10a.pdf). > > So: > 150: 03 10 03 10 0b 00 01 00 fe ca 41 01 1f 1e f0 00 > 160: 0f 00 a0 40 f0 00 00 00 00 00 00 00 00 00 00 00 > > We can see that L1 PM Substate *is* enabled: > 004h = 41 01 1f 1e > 008h = 0f 00 f0 00 > 00Ch = a0 40 f0 00 Wow! That's extremely useful. But I do have some problems placing the individiual bits right in these LE registers. And so have you, I believe... You are 2 bytes off. "41 01" is part of the vendor specific header (12 bits length == 0x014 and 4 bits version == 0x1. So I made a simple patch for lspci based on your info. Seems to work for me: 03:00.0 Network controller [0280]: Intel Corporation Wireless 7260 [8086:08b1] (rev 63) Subsystem: Intel Corporation Dual Band Wireless-AC 7260 [8086:4070] Physical Slot: 1 Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- SERR- I may have messed up things here... > > According to System / HW, it is unsafe to disable L1 PM Substate using setpci, even if we disable it from both sides (device and bridge). This kind of settings should be done by BIOS only. > So we have 2 options here (assuming that we can't disable that in BIOS): > * either we try to disable L1 PM Substate even my colleagues think it is not safe > * either we just disable L1 altogether How about forcing ASPM even if the BIOS says it's unsupported? Has that been tested? Bjørn From de4befe40cb12a57a6edc4dd22271fa8a000d8f1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bj=C3=B8rn=20Mork?= Date: Wed, 13 Nov 2013 14:24:06 +0100 Subject: [PATCH] lspci: decode Intel vendor specific L1 PM Substates MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Bjørn Mork --- ls-ecaps.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/ls-ecaps.c b/ls-ecaps.c index c6f217e..144bf77 100644 --- a/ls-ecaps.c +++ b/ls-ecaps.c @@ -429,10 +429,13 @@ cap_rclink(struct device *d, int where) } } +static void cap_l1pm(struct device *d, int where); + static void cap_evendor(struct device *d, int where) { u32 hdr; + u16 id; printf("Vendor Specific Information: "); if (!config_fetch(d, where + PCI_EVNDR_HEADER, 4)) @@ -442,10 +445,17 @@ cap_evendor(struct device *d, int where) } hdr = get_conf_long(d, where + PCI_EVNDR_HEADER); - printf("ID=%04x Rev=%d Len=%03x \n", - BITS(hdr, 0, 16), + id = BITS(hdr, 0, 16); + printf("ID=%04x Rev=%d Len=%03x ", + id, BITS(hdr, 16, 4), BITS(hdr, 20, 12)); + + /* Intel used this vendor specific ID prior to PCI-SIG allocating 0x001e */ + if (d->dev->vendor_id == cpu_to_le16(0x8086) && id == cpu_to_le16(0xcafe)) + cap_l1pm(d, where + PCI_EVNDR_HEADER); + else + printf("\n"); } static void -- 1.7.10.4