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Tue, 21 Nov 2017 14:50:38 +0000 Received: from BN6PR18MB1249.namprd18.prod.outlook.com ([10.172.209.135]) by BN6PR18MB1249.namprd18.prod.outlook.com ([10.172.209.135]) with mapi id 15.20.0239.009; Tue, 21 Nov 2017 14:50:38 +0000 From: Chris Welch To: Vignesh R , Roger Quadros CC: "linux-usb@vger.kernel.org" , "linux-pci@vger.kernel.org" , Joao Pinto , KISHON VIJAY ABRAHAM Subject: =?utf-8?B?UkU6IHhoY2lfaGNkIEhDIGRpZWQ7IGNsZWFuaW5nIHVwIHdpdGggVFVTQjcz?= =?utf-8?B?NDAgYW5kIMK1UEQ3MjAyMDE=?= Thread-Topic: =?utf-8?B?eGhjaV9oY2QgSEMgZGllZDsgY2xlYW5pbmcgdXAgd2l0aCBUVVNCNzM0MCBh?= =?utf-8?B?bmQgwrVQRDcyMDIwMQ==?= Thread-Index: AdMsm3pYEObh81GfRsKZHbWMNJmLWwyNZo2AAAFHFQAAv+EVAAALIYyAAABklgAAIh2SAAASsa/g Date: Tue, 21 Nov 2017 14:50:38 +0000 Message-ID: References: <3dd7a4fc-da86-03cc-9b01-a0d29dd73230@ti.com> <124458f9-f824-6acb-becb-12d768b6e501@ti.com> <9dcdbc2a-9296-b260-10ed-08fde0c6f67c@ti.com> <0c095d7f-4bc1-2306-248f-035fd06c1ed8@ti.com> In-Reply-To: <0c095d7f-4bc1-2306-248f-035fd06c1ed8@ti.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Chris.Welch@viavisolutions.com; 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SRVR:BN6PR18MB1249; x-forefront-prvs: 049897979A x-forefront-antispam-report: SFV:NSPM; SFS:(10019020)(6009001)(346002)(39860400002)(376002)(24454002)(13464003)(189002)(199003)(51914003)(54906003)(7736002)(305945005)(72206003)(229853002)(14454004)(478600001)(55016002)(189998001)(93886005)(55236003)(316002)(2900100001)(74316002)(25786009)(97736004)(3846002)(86362001)(6116002)(102836003)(6246003)(6436002)(7696004)(9686003)(5660300001)(8936002)(3280700002)(53936002)(2950100002)(3660700001)(110136005)(77096006)(68736007)(50986999)(54356999)(76176999)(105586002)(33656002)(6506006)(4326008)(101416001)(53546010)(224313004)(106356001)(66066001)(224303003)(81156014)(2906002)(81166006)(99286004); DIR:OUT; SFP:1102; SCL:1; SRVR:BN6PR18MB1249; H:BN6PR18MB1249.namprd18.prod.outlook.com; FPR:; SPF:None; PTR:InfoNoRecords; MX:1; A:1; LANG:en; received-spf: None (protection.outlook.com: viavisolutions.com does not designate permitted sender hosts) spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: viavisolutions.com X-MS-Exchange-CrossTenant-Network-Message-Id: 50e1c95a-bd71-430d-f7e1-08d530ef3ab6 X-MS-Exchange-CrossTenant-originalarrivaltime: 21 Nov 2017 14:50:38.2085 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: c44ec86f-d007-4b6c-8795-8ea75e4a6f9b X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR18MB1249 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP > -----Original Message----- > From: Vignesh R [mailto:vigneshr@ti.com] > Sent: Tuesday, November 21, 2017 12:48 AM > To: Roger Quadros > Cc: Chris Welch ; linux-usb@vger.kernel.org; > linux-pci@vger.kernel.org; Joao Pinto ; KISHON VIJAY > ABRAHAM > Subject: Re: xhci_hcd HC died; cleaning up with TUSB7340 and µPD720201 > > > > On Monday 20 November 2017 07:01 PM, Roger Quadros wrote: > > On 20/11/17 15:19, Vignesh R wrote: > >> > >> > >> On Monday 20 November 2017 01:31 PM, Roger Quadros wrote: > >> [...] > >>>> > >>>> So, could you try reverting commit 8c934095fa2f3 and also apply > >>>> below patch and let me know if that fixes the issue? > >>>> > >>>> ----------- > >>>> > >>>> diff --git a/drivers/pci/dwc/pci-dra7xx.c > >>>> b/drivers/pci/dwc/pci-dra7xx.c index e77a4ceed74c..8280abc56f30 > >>>> 100644 > >>>> --- a/drivers/pci/dwc/pci-dra7xx.c > >>>> +++ b/drivers/pci/dwc/pci-dra7xx.c > >>>> @@ -259,10 +259,17 @@ static irqreturn_t > dra7xx_pcie_msi_irq_handler(int irq, void *arg) > >>>> u32 reg; > >>>> > >>>> reg = dra7xx_pcie_readl(dra7xx, > >>>> PCIECTRL_DRA7XX_CONF_IRQSTATUS_MSI); > >>>> + dra7xx_pcie_writel(dra7xx, > >>>> + PCIECTRL_DRA7XX_CONF_IRQSTATUS_MSI, reg); > >>>> > >>>> switch (reg) { > >>>> case MSI: > >>>> - dw_handle_msi_irq(pp); > >>>> + /* > >>>> + * Need to make sure no MSI IRQs are pending before > >>>> + * exiting handler, else the wrapper will not catch new > >>>> + * IRQs. So loop around till dw_handle_msi_irq() returns > >>>> + * IRQ_NONE > >>>> + */ > >>>> + while (dw_handle_msi_irq(pp) != IRQ_NONE); The patch looks good, I haven't had a failure in a few days of testing. You should also look at incorporating the following that I needed to change to get our product working. The first change fixes a miss by one error with the interrupt lines. The second change extends a patch you developed for errata i870 but we found is applicable to RC operation as well as EPs. Thanks very much for your help! > >>> events while the interrupt handler is running and enable them just > >>> before we return from the hardirq handler? > >> > >> IIUC, you are saying to disable all MSIs at PCIe designware core > >> level, then call dw_handle_msi_irq() and then enable MSIs after > >> hardirq returns. But, the problem is if PCIe EP raises another MSI > >> after the call to EP's handler but before re-enabling MSIs, then it > >> will be ignored as IRQs are not yet enabled. > >> Ideally, EP's support Per Vector Masking(PVM) which allow RC to > >> prevent EP from sending MSI messages for sometime. But, > >> unfortunately, the cards mentioned here don't support this feature. > > > > I'm not aware of MSIs. > > > > But for any typical hardware, there should be an interrupt event > > enable register and an interrupt mask register. > > > > In the IRQ handler, we mask the interrupt but still keep the interrupt > > events enabled so that they can be latched during the time the interrupt was > masked. > > > > When the interrupt is unmasked at end of the IRQ handler, it should > > re-trigger the interrupt if any events were latched and pending. > > > > This way you don't need to keep checking for any pending events in the IRQ > handler. > > > > Thanks for the suggestion! I tried using interrupt masking at designware level. > But, unfortunately that does not help and my test cases still fail. > Seems like designware MSI status register is a non-masked status and dra7xx > specific wrapper seems to be relying on this non-masked status to raise > IRQ(instead of actual IRQ signal of designware) to CPU. There is very little > documentation in the TRM wrt how wrapper forwards designware IRQ status to > CPU. > > So, at best, I will add a check in the above while() loop and break and exit IRQ > handler, lets say after 1K loops. > > > -- > Regards > Vignesh diff --git a/drivers/pci/dwc/pci-dra7xx.c b/drivers/pci/dwc/pci-dra7xx.c old mode 100644 new mode 100755 index defa272..6245d89 --- a/drivers/pci/dwc/pci-dra7xx.c +++ b/drivers/pci/dwc/pci-dra7xx.c @@ -238,8 +238,8 @@ static int dra7xx_pcie_init_irq_domain(struct pcie_port *pp) dev_err(dev, "No PCIe Intc node found\n"); return -ENODEV; } - - dra7xx->irq_domain = irq_domain_add_linear(pcie_intc_node, 4, + // PCI interrupt lines start at 1 not zero so need to add 1 + dra7xx->irq_domain = irq_domain_add_linear(pcie_intc_node, 4 + 1, &intx_domain_ops, pp); if (!dra7xx->irq_domain) { dev_err(dev, "Failed to get a INTx IRQ domain\n"); @@ -706,10 +706,16 @@ static int __init dra7xx_pcie_probe(struct platform_device *pdev) dra7xx_pcie_writel(dra7xx, PCIECTRL_TI_CONF_DEVICE_TYPE, DEVICE_TYPE_RC); + // Errata i870 applies to RC as well as EP + ret = dra7xx_pcie_ep_legacy_mode(dev); + if (ret) + goto err_gpio; + ret = dra7xx_add_pcie_port(dra7xx, pdev); if (ret < 0) goto err_gpio; break; > >>> > >>> To avoid this kind of looping, shouldn't we be disabling all IRQ