From patchwork Thu Mar 2 10:56:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gabriele Paoloni X-Patchwork-Id: 9600031 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C1355600CB for ; Thu, 2 Mar 2017 10:59:18 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AB8AF2818E for ; Thu, 2 Mar 2017 10:59:18 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A06B728420; Thu, 2 Mar 2017 10:59:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 46CC32818E for ; Thu, 2 Mar 2017 10:59:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752375AbdCBK7H convert rfc822-to-8bit (ORCPT ); Thu, 2 Mar 2017 05:59:07 -0500 Received: from lhrrgout.huawei.com ([194.213.3.17]:11616 "EHLO lhrrgout.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752320AbdCBK7D (ORCPT ); Thu, 2 Mar 2017 05:59:03 -0500 Received: from 172.18.7.190 (EHLO LHREML713-CAH.china.huawei.com) ([172.18.7.190]) by lhrrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id DCB38090; Thu, 02 Mar 2017 10:56:24 +0000 (GMT) Received: from LHREML507-MBX.china.huawei.com ([10.201.4.190]) by LHREML713-CAH.china.huawei.com ([10.201.108.36]) with mapi id 14.03.0301.000; Thu, 2 Mar 2017 10:56:16 +0000 From: Gabriele Paoloni To: Lorenzo Pieralisi , "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" CC: "linux-kernel@vger.kernel.org" , "linux-arch@vger.kernel.org" , Bjorn Helgaas , "Wangzhou (B)" Subject: RE: [PATCH 14/20] PCI: hisi: update PCI config space remap function Thread-Topic: [PATCH 14/20] PCI: hisi: update PCI config space remap function Thread-Index: AQHSkQxoHHBWwhCEXkuoBiAKhp+sKaGBZBeA Date: Thu, 2 Mar 2017 10:56:16 +0000 Message-ID: References: <20170227151436.18698-1-lorenzo.pieralisi@arm.com> <20170227151436.18698-15-lorenzo.pieralisi@arm.com> In-Reply-To: <20170227151436.18698-15-lorenzo.pieralisi@arm.com> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.203.181.155] MIME-Version: 1.0 X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020202.58B7FA5A.00C1, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-06-18 04:22:30, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 753093d353730c58075db8102783a9b0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hi Lorenzo Many thanks for putting all of this together. > -----Original Message----- > From: Lorenzo Pieralisi [mailto:lorenzo.pieralisi@arm.com] > Sent: 27 February 2017 15:14 > To: linux-pci@vger.kernel.org; linux-arm-kernel@lists.infradead.org > Cc: linux-kernel@vger.kernel.org; linux-arch@vger.kernel.org; Lorenzo > Pieralisi; Bjorn Helgaas; Gabriele Paoloni; Wangzhou (B) > Subject: [PATCH 14/20] PCI: hisi: update PCI config space remap > function > > PCI configuration space should be mapped with a memory region type that > generates on the CPU host bus non-posted write transations. Update the > driver to use the devm_pci_remap_cfg* interface to make sure the > correct > memory mappings for PCI configuration space are used. > > Signed-off-by: Lorenzo Pieralisi > Cc: Bjorn Helgaas > Cc: Gabriele Paoloni > Cc: Zhou Wang > --- > drivers/pci/dwc/pcie-hisi.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/drivers/pci/dwc/pcie-hisi.c b/drivers/pci/dwc/pcie-hisi.c > index e3e4fed..8042780 100644 > --- a/drivers/pci/dwc/pcie-hisi.c > +++ b/drivers/pci/dwc/pcie-hisi.c > @@ -294,10 +294,9 @@ static int hisi_pcie_probe(struct platform_device > *pdev) > } > > reg = platform_get_resource_byname(pdev, IORESOURCE_MEM, > "rc_dbi"); > - pci->dbi_base = devm_ioremap_resource(dev, reg); > + pci->dbi_base = devm_pci_remap_cfg_resource(dev, reg); > if (IS_ERR(pci->dbi_base)) > return PTR_ERR(pci->dbi_base); > - > platform_set_drvdata(pdev, hisi_pcie); > > ret = hisi_add_pcie_port(hisi_pcie, pdev); > -- > 2.10.0 I think you missed a couple of places where cfg space is ioremapped. I have added these and merged with your changes in the patch below: Thanks again Gab --------------------------------- From: Lorenzo Pieralisi Date: Tue, 21 Feb 2017 15:24:34 +0000 Subject: [PATCH 09/15] PCI: hisi: update PCI config space remap function PCI configuration space should be mapped with a memory region type that generates on the CPU host bus non-posted write transations. Update the driver to use the devm_pci_remap_cfg* interface to make sure the correct memory mappings for PCI configuration space are used. Signed-off-by: Lorenzo Pieralisi Signed-off-by: Gabriele Paoloni Cc: Bjorn Helgaas Cc: Gabriele Paoloni Cc: Zhou Wang --- drivers/pci/dwc/pcie-hisi.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/pci/dwc/pcie-hisi.c b/drivers/pci/dwc/pcie-hisi.c index e3e4fed..a5b542c 100644 --- a/drivers/pci/dwc/pcie-hisi.c +++ b/drivers/pci/dwc/pcie-hisi.c @@ -99,7 +99,7 @@ static int hisi_pcie_init(struct pci_config_window *cfg) return -ENOMEM; } - reg_base = devm_ioremap(dev, res->start, resource_size(res)); + reg_base = devm_pci_remap_cfgspace(dev, res->start, resource_size(res)); if (!reg_base) return -ENOMEM; @@ -294,10 +294,9 @@ static int hisi_pcie_probe(struct platform_device *pdev) } reg = platform_get_resource_byname(pdev, IORESOURCE_MEM, "rc_dbi"); - pci->dbi_base = devm_ioremap_resource(dev, reg); + pci->dbi_base = devm_pci_remap_cfg_resource(dev, reg); if (IS_ERR(pci->dbi_base)) return PTR_ERR(pci->dbi_base); - platform_set_drvdata(pdev, hisi_pcie); ret = hisi_add_pcie_port(hisi_pcie, pdev); @@ -358,7 +357,7 @@ static int hisi_pcie_platform_init(struct pci_config_window *cfg) return -EINVAL; } - reg_base = devm_ioremap(dev, res->start, resource_size(res)); + reg_base = devm_pci_remap_cfgspace(dev, res->start, resource_size(res)); if (!reg_base) return -ENOMEM;