From patchwork Wed May 20 15:41:04 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Allen Hubbe X-Patchwork-Id: 6449281 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id DBDCC9F318 for ; Wed, 20 May 2015 20:46:59 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0D032203EC for ; Wed, 20 May 2015 20:46:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 25609203E5 for ; Wed, 20 May 2015 20:46:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755146AbbETUqa (ORCPT ); Wed, 20 May 2015 16:46:30 -0400 Received: from mailuogwhop.emc.com ([168.159.213.141]:39134 "EHLO mailuogwhop.emc.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754712AbbETUmF (ORCPT ); Wed, 20 May 2015 16:42:05 -0400 Received: from maildlpprd05.lss.emc.com (maildlpprd05.lss.emc.com [10.253.24.37]) by mailuogwprd04.lss.emc.com (Sentrion-MTA-4.3.1/Sentrion-MTA-4.3.0) with ESMTP id t4KKg0QB030379 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Wed, 20 May 2015 16:42:02 -0400 X-DKIM: OpenDKIM Filter v2.4.3 mailuogwprd04.lss.emc.com t4KKg0QB030379 DKIM-Signature: v=1; a=rsa-sha1; c=relaxed/relaxed; d=emc.com; s=jan2013; t=1432154522; bh=czAsjjwg+c8YV21Vv8z9ECZYXQE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: In-Reply-To:References; b=sNCb2QH9Jg7BR34E6mKTuMqZsd9WPp2KGt5mSdLKoL1VE2viS6ZQTJCt9bi0A02fz waURYFBvcusKiXvRJNKDb9zdC4ydjB5nKcQMZgoZwfrSf6E7o9WEk+zy1vvMDqKNac V0pQWs9CbWpCCo6SCNXGkQQqe0LGprYjbH95tl0M= X-DKIM: OpenDKIM Filter v2.4.3 mailuogwprd04.lss.emc.com t4KKg0QB030379 Received: from mailsyshubprd06.lss.emc.com (mailsyshubprd06.lss.emc.com [10.253.24.24]) by maildlpprd05.lss.emc.com (RSA Interceptor); Wed, 20 May 2015 16:41:16 -0400 Received: from HY-R1012-SPA.usd.lab.emc.com.com (hy-r1012-spa.rtp.lab.emc.com [10.6.71.221]) by mailsyshubprd06.lss.emc.com (Sentrion-MTA-4.3.1/Sentrion-MTA-4.3.0) with ESMTP id t4KKffto012675; Wed, 20 May 2015 16:41:45 -0400 From: Allen Hubbe To: linux-ntb@googlegroups.com Cc: linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, Jon Mason , Dave Jiang Subject: [PATCH 03/16] ntb: Enable link training for RP mode in the driver probe Date: Wed, 20 May 2015 11:41:04 -0400 Message-Id: X-Mailer: git-send-email 2.4.0.rc0.44.g244209c.dirty In-Reply-To: References: In-Reply-To: References: X-RSA-Classifications: public X-Sentrion-Hostname: mailuogwprd04.lss.emc.com Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00, DATE_IN_PAST_03_06, DKIM_SIGNED,RCVD_IN_DNSWL_HI,T_DKIM_INVALID,T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Dave Jiang Link training for RP should be enabled in the driver probe. We should not have to wait for transport loaded for this to hapen. Otherwise the device will not show up on the transparent bridge side. Signed-off-by: Dave Jiang --- drivers/ntb/hw/intel/ntb_hw_intel.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/ntb/hw/intel/ntb_hw_intel.c b/drivers/ntb/hw/intel/ntb_hw_intel.c index 05c4b77..d162f22 100644 --- a/drivers/ntb/hw/intel/ntb_hw_intel.c +++ b/drivers/ntb/hw/intel/ntb_hw_intel.c @@ -1333,6 +1333,9 @@ static int snb_poll_link(struct intel_ntb_dev *ndev) static int snb_link_is_up(struct intel_ntb_dev *ndev) { + if (ndev->ntb.topo == NTB_TOPO_SEC) + return 1; + return NTB_LNK_STA_ACTIVE(ndev->lnk_sta); } @@ -1642,6 +1645,7 @@ static int snb_setup_b2b_mw(struct intel_ntb_dev *ndev, static int snb_init_ntb(struct intel_ntb_dev *ndev) { int rc; + u32 ntb_ctl; if (ndev->bar4_split) ndev->mw_count = HSX_SPLIT_BAR_MW_COUNT; @@ -1658,6 +1662,12 @@ static int snb_init_ntb(struct intel_ntb_dev *ndev) dev_err(ndev_dev(ndev), "NTB Primary config disabled\n"); return -EINVAL; } + + /* enable link to allow secondary side device to appear */ + ntb_ctl = ioread32(ndev->self_mmio + ndev->reg->ntb_ctl); + ntb_ctl &= ~NTB_CTL_DISABLE; + iowrite32(ntb_ctl, ndev->self_mmio + ndev->reg->ntb_ctl); + /* use half the spads for the peer */ ndev->spad_count >>= 1; ndev->self_reg = &snb_pri_reg;