From patchwork Tue Jul 26 11:42:21 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 9248033 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0C5EC607D8 for ; Tue, 26 Jul 2016 11:44:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EF9F226A4D for ; Tue, 26 Jul 2016 11:44:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E412F26C72; Tue, 26 Jul 2016 11:44:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8703926A4D for ; Tue, 26 Jul 2016 11:44:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752874AbcGZLoh (ORCPT ); Tue, 26 Jul 2016 07:44:37 -0400 Received: from Galois.linutronix.de ([146.0.238.70]:43133 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751855AbcGZLog (ORCPT ); Tue, 26 Jul 2016 07:44:36 -0400 Received: from localhost ([127.0.0.1]) by Galois.linutronix.de with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.80) (envelope-from ) id 1bS0mj-0005G2-VG; Tue, 26 Jul 2016 13:44:30 +0200 Date: Tue, 26 Jul 2016 13:42:21 +0200 (CEST) From: Thomas Gleixner To: Bjorn Helgaas cc: Marc Zyngier , Bjorn Helgaas , Bharat Kumar Gogada , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] genirq/msi: Make sure PCI MSIs are activated early In-Reply-To: <20160725144702.GA12484@localhost> Message-ID: References: <1468426713-31431-1-git-send-email-marc.zyngier@arm.com> <20160722220440.GC32142@localhost> <20160725144702.GA12484@localhost> User-Agent: Alpine 2.11 (DEB 23 2013-08-11) MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Mon, 25 Jul 2016, Bjorn Helgaas wrote: > On Mon, Jul 25, 2016 at 09:45:13AM +0200, Thomas Gleixner wrote: > I thought the original issue [1] was that PCI_MSI_FLAGS_ENABLE was being > written before PCI_MSI_ADDRESS_LO. That doesn't sound like a good > idea to me. Well. That's only a problem if the PCI device does not support masking. But yes, we missed that case back then. > That does seem like a problem. Maybe it would be better to delay > setting PCI_MSI_FLAGS_ENABLE until after the MSI address & data bits > have been set? I thought about that, but that gets ugly pretty fast. Here is an alternative solution. I think that's the proper place to do it _AFTER_ the hierarchical allocation took place. On x86 Marc's ACTIVATE_EARLY flag would not work because the message is not yet ready to be assembled. Thanks, tglx --- -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index a080f4496fe2..142341f8331b 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c @@ -645,6 +645,15 @@ static int msi_capability_init(struct pci_dev *dev, int nvec) return ret; } + /* + * The mask can be ignored and PCI 2.3 does not specify mask bits for + * each MSI interrupt. So in case of hierarchical irqdomains we need + * to make sure that if masking is not available that the msi message + * is written prior to setting the MSI enable bit in the device. + */ + if (pci_msi_ignore_mask || !entry->msi_attrib.maskbit) + irq_domain_activate_irq(irq_get_irq_data(entry->irq)); + /* Set MSI enabled bits */ pci_intx_for_msi(dev, 0); pci_msi_set_enable(dev, 1);