From patchwork Thu Sep 5 12:52:47 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Gordeev X-Patchwork-Id: 2854107 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 6BFD6C0AB5 for ; Thu, 5 Sep 2013 12:51:00 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BC977202F0 for ; Thu, 5 Sep 2013 12:50:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7444C2028F for ; Thu, 5 Sep 2013 12:50:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1763405Ab3IEMux (ORCPT ); Thu, 5 Sep 2013 08:50:53 -0400 Received: from mx1.redhat.com ([209.132.183.28]:11747 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1761785Ab3IEMuw (ORCPT ); Thu, 5 Sep 2013 08:50:52 -0400 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id r85CoiL4009127 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Thu, 5 Sep 2013 08:50:44 -0400 Received: from dhcp-26-207.brq.redhat.com (dhcp-26-122.brq.redhat.com [10.34.26.122]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id r85CodWo023970 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES128-SHA bits=128 verify=NO); Thu, 5 Sep 2013 08:50:42 -0400 Date: Thu, 5 Sep 2013 14:52:47 +0200 From: Alexander Gordeev To: linux-kernel@vger.kernel.org Cc: x86@kernel.org, linux-pci@vger.kernel.org, linux-ide@vger.kernel.org, Tejun Heo , Ingo Molnar , Joerg Roedel , Jan Beulich , Bjorn Helgaas Subject: [PATCH v2 2/6] PCI/MSI: Factor out pci_get_msi_cap() interface Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) X-Scanned-By: MIMEDefang 2.68 on 10.5.11.23 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-9.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Factor out the operation of retrieving the number of MSI vectors the device requested, that is a value encoded in the Multiple Message Capable register. This change is a prerequisite for the forthcoming update of the AHCI device driver. Signed-off-by: Alexander Gordeev --- Documentation/PCI/MSI-HOWTO.txt | 12 ++++++++++++ drivers/pci/msi.c | 30 ++++++++++++++++++++---------- include/linux/pci.h | 6 ++++++ 3 files changed, 38 insertions(+), 10 deletions(-) diff --git a/Documentation/PCI/MSI-HOWTO.txt b/Documentation/PCI/MSI-HOWTO.txt index 32d7d15..205eb5d 100644 --- a/Documentation/PCI/MSI-HOWTO.txt +++ b/Documentation/PCI/MSI-HOWTO.txt @@ -209,6 +209,18 @@ on any interrupt for which it previously called request_irq(). Failure to do so results in a BUG_ON(), leaving the device with MSI enabled and thus leaking its vector. +4.2.6 pci_get_msi_cap + +int pci_get_msi_cap(struct pci_dev *dev) + +This function could be used to retrieve the number of MSI vectors the +device requested (via the Multiple Message Capable register). The MSI +specification only allows the returned value to be a power of two, +up to a maximum of 2^5 (32). + +If this function returns a negative number, it indicates the device is +not capable of sending MSIs. + 4.3 Using MSI-X The MSI-X capability is much more flexible than the MSI capability. diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index 647e9b1..c50d518 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c @@ -802,17 +802,30 @@ static int pci_msi_check_device(struct pci_dev *dev, return 0; } -int pci_enable_msi_block_part(struct pci_dev *dev, - unsigned int nvec, int nvec_mme) +int pci_get_msi_cap(struct pci_dev *dev) { - int status, maxvec; + int ret; u16 msgctl; if (!dev->msi_cap) return -EINVAL; pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &msgctl); - maxvec = 1 << ((msgctl & PCI_MSI_FLAGS_QMASK) >> 1); + ret = 1 << ((msgctl & PCI_MSI_FLAGS_QMASK) >> 1); + + return ret; +} +EXPORT_SYMBOL(pci_get_msi_cap); + +int pci_enable_msi_block_part(struct pci_dev *dev, + unsigned int nvec, int nvec_mme) +{ + int status, maxvec; + u16 msgctl; + + maxvec = pci_get_msi_cap(dev); + if (maxvec < 0) + return maxvec; if (nvec_mme < 0) nvec_mme = maxvec; @@ -869,13 +882,10 @@ EXPORT_SYMBOL(pci_enable_msi_block); int pci_enable_msi_block_auto(struct pci_dev *dev, unsigned int *maxvec) { int ret, nvec; - u16 msgctl; - - if (!dev->msi_cap) - return -EINVAL; - pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &msgctl); - ret = 1 << ((msgctl & PCI_MSI_FLAGS_QMASK) >> 1); + ret = pci_get_msi_cap(dev); + if (ret < 0) + return ret; if (maxvec) *maxvec = ret; diff --git a/include/linux/pci.h b/include/linux/pci.h index 6552cee..b866048 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -1122,6 +1122,11 @@ struct msix_entry { #ifndef CONFIG_PCI_MSI +static inline int pci_get_msi_cap(struct pci_dev *dev) +{ + return -1; +} + static inline int pci_enable_msi_block_part(struct pci_dev *dev, unsigned int nvec, int nvec_mme) { @@ -1169,6 +1174,7 @@ static inline int pci_msi_enabled(void) return 0; } #else +int pci_get_msi_cap(struct pci_dev *dev); int pci_enable_msi_block_part(struct pci_dev *dev, unsigned int nvec, int nvec_mme); int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec);