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Wed, 8 Sep 2021 20:26:30 +0200 Received: from maileu3.global.cadence.com (10.160.88.99) by maileu4.global.cadence.com (10.160.110.201) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2176.2; Wed, 8 Sep 2021 20:26:29 +0200 Received: from vleu-orange.cadence.com (10.160.88.83) by maileu3.global.cadence.com (10.160.88.99) with Microsoft SMTP Server (TLS) id 15.0.1497.2 via Frontend Transport; Wed, 8 Sep 2021 20:26:29 +0200 Received: from vleu-orange.cadence.com (localhost.localdomain [127.0.0.1]) by vleu-orange.cadence.com (8.14.4/8.14.4) with ESMTP id 188IQTCS028405; Wed, 8 Sep 2021 20:26:29 +0200 Received: (from sjakhade@localhost) by vleu-orange.cadence.com (8.14.4/8.14.4/Submit) id 188IQSKm028404; Wed, 8 Sep 2021 20:26:28 +0200 From: Swapnil Jakhade To: , , , , , CC: , , , Subject: [PATCH 0/5] PHY: Add support to output derived and received reference clock from Torrent Date: Wed, 8 Sep 2021 20:26:23 +0200 Message-ID: <20210908182628.28364-1-sjakhade@cadence.com> X-Mailer: git-send-email 2.15.0 MIME-Version: 1.0 X-OrganizationHeadersPreserved: maileu3.global.cadence.com X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: e666329a-d4a5-495a-dbc1-08d972f62ef6 X-MS-TrafficTypeDiagnostic: BL0PR07MB3986: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:4941; 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When reference clock driver is enabled, either derived or received refclk is output on cmn_refclk_p/m. In derived reference clock mode, cmn_refclk_p/m outputs the refclk derived from internal PLLs while when received refclk is selected to output on cmn_refclk_p/m, this is the internal reference clock driven on the pma_cmn_refclk_int. Swapnil Jakhade (5): phy: cadence-torrent: Migrate to clk_hw based registration and OF APIs dt-bindings: phy: cadence-torrent: Add clock IDs for derived and received refclk phy: cadence-torrent: Add support for derived reference clock output phy: cadence-torrent: Add support for received reference clock output phy: cadence-torrent: Model reference clock driver as a gate and mux clock drivers/phy/cadence/phy-cadence-torrent.c | 316 +++++++++++++++++++--- include/dt-bindings/phy/phy-cadence.h | 2 + 2 files changed, 286 insertions(+), 32 deletions(-)