| Message ID | 20230317185415.2000564-1-colin.foster@in-advantage.com |
|---|---|
| Headers | show |
| Series | add support for ocelot external ports | expand |
Hello: This series was applied to netdev/net-next.git (main) by David S. Miller <davem@davemloft.net>: On Fri, 17 Mar 2023 11:54:06 -0700 you wrote: > This is the start of part 3 of what is hopefully a 3-part series to add > Ethernet switching support to Ocelot chips. > > Part 1 of the series (A New Chip) added general support for Ocelot chips > that were controlled externally via SPI. > https://lore.kernel.org/all/20220815005553.1450359-1-colin.foster@in-advantage.com/ > > [...] Here is the summary with links: - [v2,net-next,1/9] phy: phy-ocelot-serdes: add ability to be used in a non-syscon configuration https://git.kernel.org/netdev/net-next/c/672faa7bbf60 - [v2,net-next,2/9] mfd: ocelot: add ocelot-serdes capability https://git.kernel.org/netdev/net-next/c/c21ff0939d1d - [v2,net-next,3/9] net: mscc: ocelot: expose ocelot_pll5_init routine https://git.kernel.org/netdev/net-next/c/fec53f449458 - [v2,net-next,4/9] net: mscc: ocelot: expose generic phylink_mac_config routine https://git.kernel.org/netdev/net-next/c/69f7f89c0db5 - [v2,net-next,5/9] net: mscc: ocelot: expose serdes configuration function https://git.kernel.org/netdev/net-next/c/dfca93ed51a7 - [v2,net-next,6/9] net: dsa: felix: attempt to initialize internal hsio plls https://git.kernel.org/netdev/net-next/c/3821fd0107b0 - [v2,net-next,7/9] net: dsa: felix: allow configurable phylink_mac_config https://git.kernel.org/netdev/net-next/c/544435c9346a - [v2,net-next,8/9] net: dsa: felix: allow serdes configuration for dsa ports https://git.kernel.org/netdev/net-next/c/6865ecee385b - [v2,net-next,9/9] net: dsa: ocelot: add support for external phys https://git.kernel.org/netdev/net-next/c/4c05e5ceecbb You are awesome, thank you!
This is the start of part 3 of what is hopefully a 3-part series to add Ethernet switching support to Ocelot chips. Part 1 of the series (A New Chip) added general support for Ocelot chips that were controlled externally via SPI. https://lore.kernel.org/all/20220815005553.1450359-1-colin.foster@in-advantage.com/ Part 2 of the series (The Ethernet Strikes Back) added DSA Ethernet support for ports 0-3, which are the four copper ports that are internal to the chip. https://lore.kernel.org/all/20230127193559.1001051-1-colin.foster@in-advantage.com/ Part 3 will, at a minimum, add support for ports 4-7, which are configured to use QSGMII to an external phy (Return Of The QSGMII). With any luck, and some guidance, support for SGMII, SFPs, etc. will also be part of this series. V1 was submitted as an RFC - and that was rightly so. I suspected I wasn't doing something right, and that was certainly the case. V2 is much cleaner, so hopefully upgrading it to PATCH status is welcomed. Thanks to Russell and Vladimir for correcting my course from V1. In V1 I included a device tree snippet. I won't repeat that here, but I will include a boot log snippet, in case it is of use: [ 3.212660] pinctrl-ocelot ocelot-pinctrl.0.auto: DMA mask not set [ 3.222153] pinctrl-ocelot ocelot-pinctrl.0.auto: driver registered [ 3.232112] pinctrl-microchip-sgpio ocelot-sgpio.1.auto: DMA mask not set [ 3.251195] mscc-miim ocelot-miim0.2.auto: DMA mask not set [ 3.778295] mscc-miim ocelot-miim1.3.auto: DMA mask not set [ 3.816668] mscc,ocelot-serdes ocelot-serdes.4.auto: DMA mask not set [ 3.831564] ocelot-ext-switch ocelot-ext-switch.5.auto: DMA mask not set [ 5.058979] ocelot-ext-switch ocelot-ext-switch.5.auto: PHY [ocelot-miim0.2.auto-mii:00] driver [Generic PHY] (irq=POLL) [ 5.070626] ocelot-ext-switch ocelot-ext-switch.5.auto: configuring for phy/internal link mode [ 5.088558] ocelot-ext-switch ocelot-ext-switch.5.auto swp1 (uninitialized): PHY [ocelot-miim0.2.auto-mii:01] driver [Generic PHY] (irq=POLL) [ 5.108095] ocelot-ext-switch ocelot-ext-switch.5.auto swp2 (uninitialized): PHY [ocelot-miim0.2.auto-mii:02] driver [Generic PHY] (irq=POLL) [ 5.127379] ocelot-ext-switch ocelot-ext-switch.5.auto swp3 (uninitialized): PHY [ocelot-miim0.2.auto-mii:03] driver [Generic PHY] (irq=POLL) [ 5.938382] ocelot-ext-switch ocelot-ext-switch.5.auto swp4 (uninitialized): PHY [ocelot-miim1.3.auto-mii:04] driver [Microsemi GE VSC8514 SyncE] (irq=POLL) [ 6.118399] ocelot-ext-switch ocelot-ext-switch.5.auto swp5 (uninitialized): PHY [ocelot-miim1.3.auto-mii:05] driver [Microsemi GE VSC8514 SyncE] (irq=POLL) [ 6.268432] ocelot-ext-switch ocelot-ext-switch.5.auto swp6 (uninitialized): PHY [ocelot-miim1.3.auto-mii:06] driver [Microsemi GE VSC8514 SyncE] (irq=POLL) [ 6.448413] ocelot-ext-switch ocelot-ext-switch.5.auto swp7 (uninitialized): PHY [ocelot-miim1.3.auto-mii:07] driver [Microsemi GE VSC8514 SyncE] (irq=POLL) [ 6.467007] cpsw-switch 4a100000.switch eth0: entered promiscuous mode [ 6.473676] DSA: tree 0 setup v1 -> v2 * Remove complex and incorrect device tree parsing logic * Add and utilize felix->info->phylink_mac_config() and felix->info->configure_serdes(). Colin Foster (9): phy: phy-ocelot-serdes: add ability to be used in a non-syscon configuration mfd: ocelot: add ocelot-serdes capability net: mscc: ocelot: expose ocelot_pll5_init routine net: mscc: ocelot: expose generic phylink_mac_config routine net: mscc: ocelot: expose serdes configuration function net: dsa: felix: attempt to initialize internal hsio plls net: dsa: felix: allow configurable phylink_mac_config net: dsa: felix: allow serdes configuration for dsa ports net: dsa: ocelot: add support for external phys drivers/mfd/ocelot-core.c | 13 +++ drivers/net/dsa/ocelot/felix.c | 19 +++++ drivers/net/dsa/ocelot/felix.h | 7 ++ drivers/net/dsa/ocelot/ocelot_ext.c | 16 ++-- drivers/net/ethernet/mscc/ocelot.c | 97 ++++++++++++++++++++++ drivers/net/ethernet/mscc/ocelot_net.c | 50 ++--------- drivers/net/ethernet/mscc/ocelot_vsc7514.c | 30 ------- drivers/phy/mscc/phy-ocelot-serdes.c | 9 ++ include/soc/mscc/ocelot.h | 9 ++ 9 files changed, 169 insertions(+), 81 deletions(-)