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Sun, 25 Jun 2023 04:42:23 -0700 (PDT) Received: from umbar.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id b23-20020ac25637000000b004f87893ce21sm637323lff.3.2023.06.25.04.42.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 25 Jun 2023 04:42:23 -0700 (PDT) From: Dmitry Baryshkov To: Rob Clark , Sean Paul , Abhinav Kumar , Marijn Suijten , Vinod Koul , Kishon Vijay Abraham I Cc: Philipp Zabel , Stephen Boyd , David Airlie , Daniel Vetter , Bjorn Andersson , Konrad Dybcio , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-phy@lists.infradead.org Subject: [PATCH v2 00/15] drm/msm/hdmi & phy: use generic PHY framework Date: Sun, 25 Jun 2023 14:42:07 +0300 Message-Id: <20230625114222.96689-1-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230625_044229_291051_4D5E89BA X-CRM114-Status: GOOD ( 14.28 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org The MSM HDMI PHYs have been using the ad-hoc approach / API instead of using the generic API framework. Move all the PHYs to drivers/phy/qualcomm and rework them to use generic PHY framework. This way all the QMP-related code is kept close. Also in future this will allow us to use a common set of functions to setup msm8974 HDMI PHY, 28nm DSI PHY and apq8964 SATA PHY (which all use UNI PLL internally). This also causes some design changes. Currently on msm8996 the HDMI PLL implements clock's set_rate(), while other HDMI PHY drivers used the ad-hoc PHY API for setting the PLL rate (this includes in-tree msm8960 driver and posted, but not merged, msm8974 driver). This might result in the PLL being set to one rate, while the rest of the PHY being tuned to work at another rate. Adopt the latter idea and always use phy_configure() to tune the PHY and set the PLL rate. Changes since v1: - Changed msm8960 / apq8064 to calculate register data instead of using fixed tables. This extends the list of supported modes. (Implementation is based on mdss-hdmi-pll-28lpm.c from msm-4.14). - Fixed the reprogramming of PLL rate on apq8064. - Merged all non-QMP HDMI PHY drivers into a common PHY_QCOM_HDMI driver (suggested by Rob Clark) Dmitry Baryshkov (14): phy: qualcomm: add QMP HDMI PHY driver phy: qcom: apq8064-sata: extract UNI PLL register defines phy: qcom-uniphy: add more registers from display PHYs phy: qualcomm: add legacy HDMI PHY driver phy: qualcomm: add MSM8974 HDMI PHY support phy: qualcomm: add MSM8x60 HDMI PHY support drm/msm/hdmi: move the alt_iface clock to the hpd list drm/msm/hdmi: simplify extp clock handling drm/msm/hdmi: correct indentation of HDMI bridge functions drm/msm/hdmi: switch to atomic_pre_enable/post_disable drm/msm/hdmi: set infoframes on all pre_enable calls drm/msm/hdmi: pair msm_hdmi_phy_powerup with msm_hdmi_phy_powerdown drm/msm/hdmi: switch to generic PHY subsystem drm/msm/hdmi: drop old HDMI PHY code Sandor Yu (1): phy: Add HDMI configuration options drivers/gpu/drm/msm/Makefile | 6 - drivers/gpu/drm/msm/hdmi/hdmi.c | 86 +- drivers/gpu/drm/msm/hdmi/hdmi.h | 79 +- drivers/gpu/drm/msm/hdmi/hdmi_bridge.c | 108 ++- drivers/gpu/drm/msm/hdmi/hdmi_phy.c | 217 ----- drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c | 51 -- drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c | 765 ------------------ drivers/gpu/drm/msm/hdmi/hdmi_phy_8x60.c | 141 ---- drivers/gpu/drm/msm/hdmi/hdmi_phy_8x74.c | 44 - drivers/gpu/drm/msm/hdmi/hdmi_pll_8960.c | 458 ----------- drivers/phy/qualcomm/Kconfig | 21 + drivers/phy/qualcomm/Makefile | 13 + drivers/phy/qualcomm/phy-qcom-apq8064-sata.c | 23 +- drivers/phy/qualcomm/phy-qcom-hdmi-28hpm.c | 327 ++++++++ drivers/phy/qualcomm/phy-qcom-hdmi-28lpm.c | 439 ++++++++++ drivers/phy/qualcomm/phy-qcom-hdmi-45nm.c | 184 +++++ drivers/phy/qualcomm/phy-qcom-hdmi-preqmp.c | 211 +++++ drivers/phy/qualcomm/phy-qcom-hdmi-preqmp.h | 81 ++ drivers/phy/qualcomm/phy-qcom-qmp-hdmi-base.c | 184 +++++ .../phy/qualcomm/phy-qcom-qmp-hdmi-msm8996.c | 441 ++++++++++ drivers/phy/qualcomm/phy-qcom-qmp-hdmi.h | 75 ++ drivers/phy/qualcomm/phy-qcom-uniphy.h | 65 ++ include/linux/phy/phy-hdmi.h | 33 + include/linux/phy/phy.h | 7 +- 24 files changed, 2162 insertions(+), 1897 deletions(-) delete mode 100644 drivers/gpu/drm/msm/hdmi/hdmi_phy.c delete mode 100644 drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c delete mode 100644 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c delete mode 100644 drivers/gpu/drm/msm/hdmi/hdmi_phy_8x60.c delete mode 100644 drivers/gpu/drm/msm/hdmi/hdmi_phy_8x74.c delete mode 100644 drivers/gpu/drm/msm/hdmi/hdmi_pll_8960.c create mode 100644 drivers/phy/qualcomm/phy-qcom-hdmi-28hpm.c create mode 100644 drivers/phy/qualcomm/phy-qcom-hdmi-28lpm.c create mode 100644 drivers/phy/qualcomm/phy-qcom-hdmi-45nm.c create mode 100644 drivers/phy/qualcomm/phy-qcom-hdmi-preqmp.c create mode 100644 drivers/phy/qualcomm/phy-qcom-hdmi-preqmp.h create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-hdmi-base.c create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-hdmi-msm8996.c create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-hdmi.h create mode 100644 drivers/phy/qualcomm/phy-qcom-uniphy.h create mode 100644 include/linux/phy/phy-hdmi.h