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Fri, 20 Dec 2024 05:54:03 +0000 Received: from APTAIPPMTA01.qualcomm.com (APTAIPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 4BK5s3w9023955; Fri, 20 Dec 2024 05:54:03 GMT Received: from cse-cd02-lnx.ap.qualcomm.com (cse-cd02-lnx.qualcomm.com [10.64.75.246]) by APTAIPPMTA01.qualcomm.com (PPS) with ESMTPS id 4BK5s27a023942 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 20 Dec 2024 05:54:03 +0000 Received: by cse-cd02-lnx.ap.qualcomm.com (Postfix, from userid 4438065) id 0DB621C38; Fri, 20 Dec 2024 13:54:01 +0800 (CST) From: Ziyue Zhang To: vkoul@kernel.org, kishon@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dmitry.baryshkov@linaro.org, neil.armstrong@linaro.org, abel.vesa@linaro.org, manivannan.sadhasivam@linaro.org, lpieralisi@kernel.org, kw@linux.com, bhelgaas@google.com, andersson@kernel.org, konradybcio@kernel.org Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, quic_qianyu@quicinc.com, quic_krichai@quicinc.com, quic_vbadigan@quicinc.com, Ziyue Zhang Subject: [PATCH v3 0/8] pci: qcom: Add QCS8300 PCIe support Date: Fri, 20 Dec 2024 13:52:31 +0800 Message-Id: <20241220055239.2744024-1-quic_ziyuzhan@quicinc.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: AsbRgjc-J_-ttTvhMMYgSXB1rsMACo-i X-Proofpoint-ORIG-GUID: AsbRgjc-J_-ttTvhMMYgSXB1rsMACo-i X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1011 suspectscore=0 phishscore=0 adultscore=0 bulkscore=0 mlxlogscore=841 impostorscore=0 malwarescore=0 priorityscore=1501 spamscore=0 lowpriorityscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412200048 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241219_215413_416713_AB5FA6EA X-CRM114-Status: GOOD ( 11.79 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org This series adds document, phy, configs support for PCIe in QCS8300. The series depend on the following devicetree. Have follwing changes: - Document the QMP PCIe PHY on the QCS8300 platform. - Add dedicated schema for the PCIe controllers found on QCS8300. - Add compatible for qcs8300 platform. - Add configurations in devicetree for PCIe0, including registers, clocks, interrupts and phy setting sequence. - Add configurations in devicetree for PCIe1, including registers, clocks, interrupts and phy setting sequence. Signed-off-by: Krishna chaitanya chundru Signed-off-by: Ziyue Zhang --- Changes in v3: - Add received tag(Rob & Dmitry) - Update pcie_phy in gcc node to soc dtsi(Dmitry & Konrad) - remove pcieprot0 node(Konrad & Mani) - Fix format comments(Konrad) - Update base-commit to tag: next-20241213(Bjorn) - Corrected of_device_id.data from 1.9.0 to 1.34.0. - Link to v2: https://lore.kernel.org/all/20241128081056.1361739-1-quic_ziyuzhan@quicinc.com/ Changes in v2: - Fix some format comments and match the style in x1e80100(Konrad) - Add global interrupt for PCIe0 and PCIe1(Konrad) - split the soc dtsi and the platform dts into two changes(Konrad) - Link to v1: https://lore.kernel.org/all/20241114095409.2682558-1-quic_ziyuzhan@quicinc.com/ Ziyue Zhang (8): dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the QCS8300 QMP PCIe PHY Gen4 x2 phy: qcom-qmp-pcie: add dual lane PHY support for QCS8300 dt-bindings: PCI: qcom,pcie-sa8775p: document qcs8300 PCI: qcom: Add QCS8300 PCIe support arm64: dts: qcom: qcs8300: enable pcie0 for qcs8300 soc arm64: dts: qcom: qcs8300: enable pcie0 for qcs8300 platform arm64: dts: qcom: qcs8300: enable pcie1 for qcs8300 soc arm64: dts: qcom: qcs8300: enable pcie1 for qcs8300 platform .../bindings/pci/qcom,pcie-sa8775p.yaml | 7 +- .../phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 2 + arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 82 ++++ arch/arm64/boot/dts/qcom/qcs8300.dtsi | 349 +++++++++++++++++- drivers/pci/controller/dwc/pcie-qcom.c | 1 + drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 89 +++++ 6 files changed, 527 insertions(+), 3 deletions(-) base-commit: 4176cf5c5651c33769de83bb61b0287f4ec7719f