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[91.139.201.119]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3997f9e6651sm2437162f8f.75.2025.03.21.06.58.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Mar 2025 06:58:57 -0700 (PDT) From: Ivaylo Ivanov To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Philipp Zabel , Marek Szyprowski , Sylwester Nawrocki , Abel Vesa Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v3 00/10] phy: samsung: add Exynos2200 SNPS eUSB2 driver Date: Fri, 21 Mar 2025 15:58:44 +0200 Message-ID: <20250321135854.1431375-1-ivo.ivanov.ivanov1@gmail.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250321_065900_300907_FF348B27 X-CRM114-Status: GOOD ( 19.40 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org Hey folks, This patchset adds Exynos2200 support to the existing eUSB2 phy driver, as well as USBDRD support for that SoC. The SoC features the same (as far as I can tell from comparing code) USBDRD 3.2 4nm block that Exynos2400 has, hence the common denominator. It consists of a SEC USB link controller, Synopsys eUSB2 and Synopsys USBDP combophy, which are independent underlying hardware blocks of the USBDRD controller. In the vendor kernel, everything is handled in the usbdrd controller driver, with helpers for underlying hardware block functions outside it. Clocks and regulators are specified and enabled in one node, which makes it difficult to separate what clocks and regulators go where without access to schematics or TRMs. The following gates are defined for USB: CLK_BLK_HSI0_UID_USB32DRD_IPCLKPORT_I_USBSUBCTL_APB_PCLK CLK_BLK_HSI0_UID_USB32DRD_IPCLKPORT_I_USBDPPHY_CTRL_PCLK CLK_BLK_HSI0_UID_USB32DRD_IPCLKPORT_I_USBDPPHY_TCA_APB_CLK CLK_BLK_HSI0_UID_USB32DRD_IPCLKPORT_I_USBLINK_ACLK CLK_BLK_HSI0_UID_USB32DRD_IPCLKPORT_I_USB32DRD_REF_CLK_40 CLK_BLK_HSI0_UID_USB32DRD_IPCLKPORT_I_EUSB_CTRL_PCLK CLK_BLK_HSI0_UID_USB32DRD_IPCLKPORT_I_EUSB_APB_CLK CLK_BLK_HSI0_UID_AS_APB_EUSBPHY_HSI0_IPCLKPORT_PCLKM CLK_BLK_HSI0_UID_RSTNSYNC_CLK_HSI0_EUSB_IPCLKPORT_CLK The vendor kernel specifies 4 regulators, 2 of which are for eUSB and the other 2 for the repeater. The rest of the PHYs and the dwc3 controller are on a single power domain (hsi0), so they're most likely sharing power rails. As Qualcomm is also using the eUSB2 IP, the approach taken here is to rename the driver so that it can be used by other SoC vendors as well while keeping compatibles SoC-vendor prefixed (different vendors have different implementations of the IP with different register maps), add support for exynos2200 in it and implement support for exynos2200 in the existing exynos5-usbdrd driver (with link controller init). A new USBDP driver will be added later on, so that super-speed can be configured. Bindings have been tested: $ make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- -j4 dt_binding_check DT_SCHEMA_FILES="Documentation/devicetree/bindings/phy/snps,eusb2-phy.yaml" CHKDT ./Documentation/devicetree/bindings LINT ./Documentation/devicetree/bindings DTC [C] Documentation/devicetree/bindings/phy/snps,eusb2-phy.example.dtb Best regards, Ivaylo Changes in v3: USBCON changes: - drop the driver and introduce it all in existing exynos5-usbdrd driver EUSB2 changes: - split changes into multiple commits with clear diff - add a commit to do table-based lookup for refclk - clean up here and there - correct the cover letter according to my new knowledge of how the hardware functions - change commit message of the optional repeater patch Changes in v2: USBCON changes: - drop unused header includes - sanitize the binding - proper init and exit power management - shorten some variables - unrelax reads and writes - update commit description - remodel to take other phys - drop specified regulators as these are for the repeater - make the kconfig description better - general cleanup EUSB2 changes: - merge the previous separate driver into the qualcomm one - drop the previous model of taking usbcon phandle Ivaylo Ivanov (10): dt-bindings: phy: add exynos2200 eusb2 phy support dt-bindings: phy: samsung,usb3-drd-phy: add exynos2200 support phy: move phy-qcom-snps-eusb2 out of its vendor sub-directory phy: phy-snps-eusb2: refactor constructs names phy: phy-snps-eusb2: split phy init code phy: phy-snps-eusb2: make repeater optional phy: phy-snps-eusb2: make reset control optional phy: phy-snps-eusb2: refactor reference clock init phy: phy-snps-eusb2: add support for exynos2200 phy: exynos5-usbdrd: support Exynos USBDRD 3.2 4nm controller .../bindings/phy/samsung,usb3-drd-phy.yaml | 38 +- ...nps-eusb2-phy.yaml => snps,eusb2-phy.yaml} | 62 +- drivers/phy/Kconfig | 8 + drivers/phy/Makefile | 1 + drivers/phy/phy-snps-eusb2.c | 629 ++++++++++++++++++ drivers/phy/qualcomm/Kconfig | 9 - drivers/phy/qualcomm/Makefile | 1 - drivers/phy/qualcomm/phy-qcom-snps-eusb2.c | 442 ------------ drivers/phy/samsung/phy-exynos5-usbdrd.c | 227 ++++++- include/linux/soc/samsung/exynos-regs-pmu.h | 3 + 10 files changed, 941 insertions(+), 479 deletions(-) rename Documentation/devicetree/bindings/phy/{qcom,snps-eusb2-phy.yaml => snps,eusb2-phy.yaml} (59%) create mode 100644 drivers/phy/phy-snps-eusb2.c delete mode 100644 drivers/phy/qualcomm/phy-qcom-snps-eusb2.c