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[v2,3/8] dt-bindings: phy: uniphier-pcie: Add bindings for NX1 SoC

Message ID 1634687888-23900-4-git-send-email-hayashi.kunihiko@socionext.com
State Superseded
Headers show
Series phy: socionext: Introduce some features for UniPhier SoCs | expand

Commit Message

Kunihiko Hayashi Oct. 19, 2021, 11:58 p.m. UTC
Update PCIe-PHY binding document for UniPhier NX1 SoC. Add a compatible
string for the SoC to the document.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
 Documentation/devicetree/bindings/phy/socionext,uniphier-pcie-phy.yaml | 1 +
 1 file changed, 1 insertion(+)

Comments

Rob Herring (Arm) Oct. 28, 2021, 9:06 p.m. UTC | #1
On Wed, 20 Oct 2021 08:58:03 +0900, Kunihiko Hayashi wrote:
> Update PCIe-PHY binding document for UniPhier NX1 SoC. Add a compatible
> string for the SoC to the document.
> 
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> ---
>  Documentation/devicetree/bindings/phy/socionext,uniphier-pcie-phy.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 

Acked-by: Rob Herring <robh@kernel.org>
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Patch

diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-pcie-phy.yaml
index 3e0566899041..fbb71d6dd531 100644
--- a/Documentation/devicetree/bindings/phy/socionext,uniphier-pcie-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-pcie-phy.yaml
@@ -19,6 +19,7 @@  properties:
       - socionext,uniphier-pro5-pcie-phy
       - socionext,uniphier-ld20-pcie-phy
       - socionext,uniphier-pxs3-pcie-phy
+      - socionext,uniphier-nx1-pcie-phy
 
   reg:
     maxItems: 1