| Message ID | 1648637715-19262-6-git-send-email-hayashi.kunihiko@socionext.com |
|---|---|
| State | Accepted |
| Commit | 09cc358a39d41152236e8f2653a94ab39b35cd3f |
| Headers | show |
| Series | dt-bindings: phy: Fix uniphier descriptions | expand |
On 30/03/2022 12:55, Kunihiko Hayashi wrote: > Instead of "oneOf:" choices, use "allOf:" and "if:" to define clocks, > clock-names, resets, and reset-names that can be taken by the compatible > string. > > The order of clock-names and reset-names doesn't change here. > > Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> > --- > .../phy/socionext,uniphier-ahci-phy.yaml | 90 +++++++++++++----- > .../phy/socionext,uniphier-pcie-phy.yaml | 47 ++++++--- > .../phy/socionext,uniphier-usb3hs-phy.yaml | 93 ++++++++++++++---- > .../phy/socionext,uniphier-usb3ss-phy.yaml | 95 +++++++++++++++---- > 4 files changed, 251 insertions(+), 74 deletions(-) > (...) > diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml > index 1bbd164f2527..21e4414eea60 100644 > --- a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml > +++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml > @@ -34,30 +34,12 @@ properties: > minItems: 2 > maxItems: 3 > > - clock-names: > - oneOf: > - - items: # for Pro5 > - - const: gio > - - const: link > - - items: # for PXs3 with phy-ext > - - const: link > - - const: phy > - - const: phy-ext > - - items: # for others > - - const: link > - - const: phy > + clock-names: true > > resets: > maxItems: 2 > > - reset-names: > - oneOf: > - - items: # for Pro5 > - - const: gio > - - const: link > - - items: # for others > - - const: link > - - const: phy > + reset-names: true > > vbus-supply: > description: A phandle to the regulator for USB VBUS > @@ -80,6 +62,77 @@ properties: > required for each port, if any one is omitted, the trimming data > of the port will not be set at all. > > +allOf: > + - if: > + properties: > + compatible: > + contains: > + const: socionext,uniphier-pro5-usb3-hsphy > + then: > + properties: > + clocks: > + minItems: 2 > + maxItems: 2 > + clock-names: > + items: > + - const: gio > + - const: link > + resets: > + minItems: 2 > + maxItems: 2 > + reset-names: > + items: > + - const: gio > + - const: link > + - if: > + properties: > + compatible: > + contains: > + enum: > + - socionext,uniphier-pxs2-usb3-hsphy > + - socionext,uniphier-ld20-usb3-hsphy > + then: > + properties: > + clocks: > + minItems: 2 > + maxItems: 2 > + clock-names: > + items: > + - const: link > + - const: phy > + resets: > + minItems: 2 > + maxItems: 2 > + reset-names: > + items: > + - const: link > + - const: phy > + - if: > + properties: > + compatible: > + contains: > + enum: > + - socionext,uniphier-pxs3-usb3-hsphy > + - socionext,uniphier-nx1-usb3-hsphy > + then: > + properties: > + clocks: > + minItems: 2 Why minItems:2? Is the last phy-ext clock optional? > + maxItems: 3 > + clock-names: > + minItems: 2 > + items: > + - const: link > + - const: phy > + - const: phy-ext > + resets: > + minItems: 2 > + maxItems: 2 > + reset-names: > + items: > + - const: link > + - const: phy > + > required: > - compatible > - reg > diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml > index 06c957d52d23..4c26d2d2303d 100644 > --- a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml > +++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml > @@ -35,34 +35,89 @@ properties: > minItems: 2 > maxItems: 3 > > - clock-names: > - oneOf: > - - items: # for Pro4, Pro5 > - - const: gio > - - const: link > - - items: # for PXs3 with phy-ext > - - const: link > - - const: phy > - - const: phy-ext > - - items: # for others > - - const: link > - - const: phy > + clock-names: true > > resets: > maxItems: 2 > > - reset-names: > - oneOf: > - - items: # for Pro4,Pro5 > - - const: gio > - - const: link > - - items: # for others > - - const: link > - - const: phy > + reset-names: true > > vbus-supply: > description: A phandle to the regulator for USB VBUS, only for USB host > > +allOf: > + - if: > + properties: > + compatible: > + contains: > + enum: > + - socionext,uniphier-pro4-usb3-ssphy > + - socionext,uniphier-pro5-usb3-ssphy > + then: > + properties: > + clocks: > + minItems: 2 > + maxItems: 2 > + clock-names: > + items: > + - const: gio > + - const: link > + resets: > + minItems: 2 > + maxItems: 2 > + reset-names: > + items: > + - const: gio > + - const: link > + - if: > + properties: > + compatible: > + contains: > + enum: > + - socionext,uniphier-pxs2-usb3-ssphy > + - socionext,uniphier-ld20-usb3-ssphy > + then: > + properties: > + clocks: > + minItems: 2 > + maxItems: 2 > + clock-names: > + items: > + - const: link > + - const: phy > + resets: > + minItems: 2 > + maxItems: 2 > + reset-names: > + items: > + - const: link > + - const: phy > + - if: > + properties: > + compatible: > + contains: > + enum: > + - socionext,uniphier-pxs3-usb3-ssphy > + - socionext,uniphier-nx1-usb3-ssphy > + then: > + properties: > + clocks: > + minItems: 2 Same question as above. > + maxItems: 3 > + clock-names: > + minItems: 2 > + items: > + - const: link > + - const: phy > + - const: phy-ext > + resets: > + minItems: 2 > + maxItems: 2 > + reset-names: > + items: > + - const: link > + - const: phy > + > required: > - compatible > - reg Best regards, Krzysztof
Hi Krzysztof, On 2022/03/31 2:40, Krzysztof Kozlowski wrote: > On 30/03/2022 12:55, Kunihiko Hayashi wrote: >> Instead of "oneOf:" choices, use "allOf:" and "if:" to define clocks, >> clock-names, resets, and reset-names that can be taken by the compatible >> string. >> >> The order of clock-names and reset-names doesn't change here. >> >> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> >> --- >> .../phy/socionext,uniphier-ahci-phy.yaml | 90 +++++++++++++----- >> .../phy/socionext,uniphier-pcie-phy.yaml | 47 ++++++--- >> .../phy/socionext,uniphier-usb3hs-phy.yaml | 93 ++++++++++++++---- >> .../phy/socionext,uniphier-usb3ss-phy.yaml | 95 +++++++++++++++---- >> 4 files changed, 251 insertions(+), 74 deletions(-) >> > > (...) > >> diff --git >> a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml >> b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml >> index 1bbd164f2527..21e4414eea60 100644 >> --- >> a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml >> +++ >> b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml >> @@ -34,30 +34,12 @@ properties: >> minItems: 2 >> maxItems: 3 >> >> - clock-names: >> - oneOf: >> - - items: # for Pro5 >> - - const: gio >> - - const: link >> - - items: # for PXs3 with phy-ext >> - - const: link >> - - const: phy >> - - const: phy-ext >> - - items: # for others >> - - const: link >> - - const: phy >> + clock-names: true >> >> resets: >> maxItems: 2 >> >> - reset-names: >> - oneOf: >> - - items: # for Pro5 >> - - const: gio >> - - const: link >> - - items: # for others >> - - const: link >> - - const: phy >> + reset-names: true >> >> vbus-supply: >> description: A phandle to the regulator for USB VBUS >> @@ -80,6 +62,77 @@ properties: >> required for each port, if any one is omitted, the trimming data >> of the port will not be set at all. >> >> +allOf: >> + - if: >> + properties: >> + compatible: >> + contains: >> + const: socionext,uniphier-pro5-usb3-hsphy >> + then: >> + properties: >> + clocks: >> + minItems: 2 >> + maxItems: 2 >> + clock-names: >> + items: >> + - const: gio >> + - const: link >> + resets: >> + minItems: 2 >> + maxItems: 2 >> + reset-names: >> + items: >> + - const: gio >> + - const: link >> + - if: >> + properties: >> + compatible: >> + contains: >> + enum: >> + - socionext,uniphier-pxs2-usb3-hsphy >> + - socionext,uniphier-ld20-usb3-hsphy >> + then: >> + properties: >> + clocks: >> + minItems: 2 >> + maxItems: 2 >> + clock-names: >> + items: >> + - const: link >> + - const: phy >> + resets: >> + minItems: 2 >> + maxItems: 2 >> + reset-names: >> + items: >> + - const: link >> + - const: phy >> + - if: >> + properties: >> + compatible: >> + contains: >> + enum: >> + - socionext,uniphier-pxs3-usb3-hsphy >> + - socionext,uniphier-nx1-usb3-hsphy >> + then: >> + properties: >> + clocks: >> + minItems: 2 > > Why minItems:2? Is the last phy-ext clock optional? In an SoC with two controllers, there is a controller that requires extra clock and a controller that does not. For example, PXs3 USB3 controller 1 needs "phy-ext" clock, but the controller 0 doesn't. This difference is related to the phy configuration, where the controller 1 requires more clocks because it shares the phy with other subsystems. So I think the last phy-ext clock should be optional. > >> + maxItems: 3 >> + clock-names: >> + minItems: 2 >> + items: >> + - const: link >> + - const: phy >> + - const: phy-ext >> + resets: >> + minItems: 2 >> + maxItems: 2 >> + reset-names: >> + items: >> + - const: link >> + - const: phy >> + >> required: >> - compatible >> - reg >> diff --git >> a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml >> b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml >> index 06c957d52d23..4c26d2d2303d 100644 >> --- >> a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml >> +++ >> b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml >> @@ -35,34 +35,89 @@ properties: >> minItems: 2 >> maxItems: 3 >> >> - clock-names: >> - oneOf: >> - - items: # for Pro4, Pro5 >> - - const: gio >> - - const: link >> - - items: # for PXs3 with phy-ext >> - - const: link >> - - const: phy >> - - const: phy-ext >> - - items: # for others >> - - const: link >> - - const: phy >> + clock-names: true >> >> resets: >> maxItems: 2 >> >> - reset-names: >> - oneOf: >> - - items: # for Pro4,Pro5 >> - - const: gio >> - - const: link >> - - items: # for others >> - - const: link >> - - const: phy >> + reset-names: true >> >> vbus-supply: >> description: A phandle to the regulator for USB VBUS, only for USB >> host >> >> +allOf: >> + - if: >> + properties: >> + compatible: >> + contains: >> + enum: >> + - socionext,uniphier-pro4-usb3-ssphy >> + - socionext,uniphier-pro5-usb3-ssphy >> + then: >> + properties: >> + clocks: >> + minItems: 2 >> + maxItems: 2 >> + clock-names: >> + items: >> + - const: gio >> + - const: link >> + resets: >> + minItems: 2 >> + maxItems: 2 >> + reset-names: >> + items: >> + - const: gio >> + - const: link >> + - if: >> + properties: >> + compatible: >> + contains: >> + enum: >> + - socionext,uniphier-pxs2-usb3-ssphy >> + - socionext,uniphier-ld20-usb3-ssphy >> + then: >> + properties: >> + clocks: >> + minItems: 2 >> + maxItems: 2 >> + clock-names: >> + items: >> + - const: link >> + - const: phy >> + resets: >> + minItems: 2 >> + maxItems: 2 >> + reset-names: >> + items: >> + - const: link >> + - const: phy >> + - if: >> + properties: >> + compatible: >> + contains: >> + enum: >> + - socionext,uniphier-pxs3-usb3-ssphy >> + - socionext,uniphier-nx1-usb3-ssphy >> + then: >> + properties: >> + clocks: >> + minItems: 2 > > Same question as above. This is also the same reason. Thank you, --- Best Regards Kunihiko Hayashi
On 31/03/2022 02:50, Kunihiko Hayashi wrote: > Hi Krzysztof, > > On 2022/03/31 2:40, Krzysztof Kozlowski wrote: >> On 30/03/2022 12:55, Kunihiko Hayashi wrote: >>> Instead of "oneOf:" choices, use "allOf:" and "if:" to define clocks, >>> clock-names, resets, and reset-names that can be taken by the compatible >>> string. >>> >>> The order of clock-names and reset-names doesn't change here. >>> >>> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> >>> --- >>> .../phy/socionext,uniphier-ahci-phy.yaml | 90 +++++++++++++----- >>> .../phy/socionext,uniphier-pcie-phy.yaml | 47 ++++++--- >>> .../phy/socionext,uniphier-usb3hs-phy.yaml | 93 ++++++++++++++---- >>> .../phy/socionext,uniphier-usb3ss-phy.yaml | 95 +++++++++++++++---- >>> 4 files changed, 251 insertions(+), 74 deletions(-) >>> >> >> (...) >> >>> diff --git >>> a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml >>> b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml >>> index 1bbd164f2527..21e4414eea60 100644 >>> --- >>> a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml >>> +++ >>> b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml >>> @@ -34,30 +34,12 @@ properties: >>> minItems: 2 >>> maxItems: 3 >>> >>> - clock-names: >>> - oneOf: >>> - - items: # for Pro5 >>> - - const: gio >>> - - const: link >>> - - items: # for PXs3 with phy-ext >>> - - const: link >>> - - const: phy >>> - - const: phy-ext >>> - - items: # for others >>> - - const: link >>> - - const: phy >>> + clock-names: true >>> >>> resets: >>> maxItems: 2 >>> >>> - reset-names: >>> - oneOf: >>> - - items: # for Pro5 >>> - - const: gio >>> - - const: link >>> - - items: # for others >>> - - const: link >>> - - const: phy >>> + reset-names: true >>> >>> vbus-supply: >>> description: A phandle to the regulator for USB VBUS >>> @@ -80,6 +62,77 @@ properties: >>> required for each port, if any one is omitted, the trimming data >>> of the port will not be set at all. >>> >>> +allOf: >>> + - if: >>> + properties: >>> + compatible: >>> + contains: >>> + const: socionext,uniphier-pro5-usb3-hsphy >>> + then: >>> + properties: >>> + clocks: >>> + minItems: 2 >>> + maxItems: 2 >>> + clock-names: >>> + items: >>> + - const: gio >>> + - const: link >>> + resets: >>> + minItems: 2 >>> + maxItems: 2 >>> + reset-names: >>> + items: >>> + - const: gio >>> + - const: link >>> + - if: >>> + properties: >>> + compatible: >>> + contains: >>> + enum: >>> + - socionext,uniphier-pxs2-usb3-hsphy >>> + - socionext,uniphier-ld20-usb3-hsphy >>> + then: >>> + properties: >>> + clocks: >>> + minItems: 2 >>> + maxItems: 2 >>> + clock-names: >>> + items: >>> + - const: link >>> + - const: phy >>> + resets: >>> + minItems: 2 >>> + maxItems: 2 >>> + reset-names: >>> + items: >>> + - const: link >>> + - const: phy >>> + - if: >>> + properties: >>> + compatible: >>> + contains: >>> + enum: >>> + - socionext,uniphier-pxs3-usb3-hsphy >>> + - socionext,uniphier-nx1-usb3-hsphy >>> + then: >>> + properties: >>> + clocks: >>> + minItems: 2 >> >> Why minItems:2? Is the last phy-ext clock optional? > > In an SoC with two controllers, there is a controller that requires extra > clock and a controller that does not. For example, PXs3 USB3 controller 1 > needs "phy-ext" clock, but the controller 0 doesn't. > > This difference is related to the phy configuration, where the controller 1 > requires more clocks because it shares the phy with other subsystems. > > So I think the last phy-ext clock should be optional. > OK, thanks for explanation. I assume we talk about the hardware, not about Linux driver needs. :) Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml index 14f7579e7daa..a3cd45acea28 100644 --- a/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml +++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml @@ -30,33 +30,79 @@ properties: minItems: 1 maxItems: 2 - clock-names: - oneOf: - - items: # for PXs2 - - const: link - - items: # for Pro4 - - const: link - - const: gio - - items: # for others - - const: link - - const: phy + clock-names: true resets: minItems: 2 maxItems: 6 - reset-names: - oneOf: - - items: # for Pro4 - - const: link - - const: gio - - const: phy - - const: pm - - const: tx - - const: rx - - items: # for others - - const: link - - const: phy + reset-names: true + +allOf: + - if: + properties: + compatible: + contains: + const: socionext,uniphier-pro4-ahci-phy + then: + properties: + clocks: + minItems: 2 + maxItems: 2 + clock-names: + items: + - const: link + - const: gio + resets: + minItems: 6 + maxItems: 6 + reset-names: + items: + - const: link + - const: gio + - const: phy + - const: pm + - const: tx + - const: rx + - if: + properties: + compatible: + contains: + const: socionext,uniphier-pxs2-ahci-phy + then: + properties: + clocks: + maxItems: 1 + clock-names: + const: link + resets: + minItems: 2 + maxItems: 2 + reset-names: + items: + - const: link + - const: phy + - if: + properties: + compatible: + contains: + const: socionext,uniphier-pxs3-ahci-phy + then: + properties: + clocks: + minItems: 2 + maxItems: 2 + clock-names: + items: + - const: link + - const: phy + resets: + minItems: 2 + maxItems: 2 + reset-names: + items: + - const: link + - const: phy required: - compatible diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-pcie-phy.yaml index fbb71d6dd531..b3ed2f74a414 100644 --- a/Documentation/devicetree/bindings/phy/socionext,uniphier-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-pcie-phy.yaml @@ -31,28 +31,51 @@ properties: minItems: 1 maxItems: 2 - clock-names: - oneOf: - - items: # for Pro5 - - const: gio - - const: link - - const: link # for others + clock-names: true resets: minItems: 1 maxItems: 2 - reset-names: - oneOf: - - items: # for Pro5 - - const: gio - - const: link - - const: link # for others + reset-names: true socionext,syscon: $ref: /schemas/types.yaml#/definitions/phandle description: A phandle to system control to set configurations for phy +allOf: + - if: + properties: + compatible: + contains: + const: socionext,uniphier-pro5-pcie-phy + then: + properties: + clocks: + minItems: 2 + maxItems: 2 + clock-names: + items: + - const: gio + - const: link + resets: + minItems: 2 + maxItems: 2 + reset-names: + items: + - const: gio + - const: link + else: + properties: + clocks: + maxItems: 1 + clock-names: + const: link + resets: + maxItems: 1 + reset-names: + const: link + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml index 1bbd164f2527..21e4414eea60 100644 --- a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml +++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml @@ -34,30 +34,12 @@ properties: minItems: 2 maxItems: 3 - clock-names: - oneOf: - - items: # for Pro5 - - const: gio - - const: link - - items: # for PXs3 with phy-ext - - const: link - - const: phy - - const: phy-ext - - items: # for others - - const: link - - const: phy + clock-names: true resets: maxItems: 2 - reset-names: - oneOf: - - items: # for Pro5 - - const: gio - - const: link - - items: # for others - - const: link - - const: phy + reset-names: true vbus-supply: description: A phandle to the regulator for USB VBUS @@ -80,6 +62,77 @@ properties: required for each port, if any one is omitted, the trimming data of the port will not be set at all. +allOf: + - if: + properties: + compatible: + contains: + const: socionext,uniphier-pro5-usb3-hsphy + then: + properties: + clocks: + minItems: 2 + maxItems: 2 + clock-names: + items: + - const: gio + - const: link + resets: + minItems: 2 + maxItems: 2 + reset-names: + items: + - const: gio + - const: link + - if: + properties: + compatible: + contains: + enum: + - socionext,uniphier-pxs2-usb3-hsphy + - socionext,uniphier-ld20-usb3-hsphy + then: + properties: + clocks: + minItems: 2 + maxItems: 2 + clock-names: + items: + - const: link + - const: phy + resets: + minItems: 2 + maxItems: 2 + reset-names: + items: + - const: link + - const: phy + - if: + properties: + compatible: + contains: + enum: + - socionext,uniphier-pxs3-usb3-hsphy + - socionext,uniphier-nx1-usb3-hsphy + then: + properties: + clocks: + minItems: 2 + maxItems: 3 + clock-names: + minItems: 2 + items: + - const: link + - const: phy + - const: phy-ext + resets: + minItems: 2 + maxItems: 2 + reset-names: + items: + - const: link + - const: phy + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml index 06c957d52d23..4c26d2d2303d 100644 --- a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml +++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml @@ -35,34 +35,89 @@ properties: minItems: 2 maxItems: 3 - clock-names: - oneOf: - - items: # for Pro4, Pro5 - - const: gio - - const: link - - items: # for PXs3 with phy-ext - - const: link - - const: phy - - const: phy-ext - - items: # for others - - const: link - - const: phy + clock-names: true resets: maxItems: 2 - reset-names: - oneOf: - - items: # for Pro4,Pro5 - - const: gio - - const: link - - items: # for others - - const: link - - const: phy + reset-names: true vbus-supply: description: A phandle to the regulator for USB VBUS, only for USB host +allOf: + - if: + properties: + compatible: + contains: + enum: + - socionext,uniphier-pro4-usb3-ssphy + - socionext,uniphier-pro5-usb3-ssphy + then: + properties: + clocks: + minItems: 2 + maxItems: 2 + clock-names: + items: + - const: gio + - const: link + resets: + minItems: 2 + maxItems: 2 + reset-names: + items: + - const: gio + - const: link + - if: + properties: + compatible: + contains: + enum: + - socionext,uniphier-pxs2-usb3-ssphy + - socionext,uniphier-ld20-usb3-ssphy + then: + properties: + clocks: + minItems: 2 + maxItems: 2 + clock-names: + items: + - const: link + - const: phy + resets: + minItems: 2 + maxItems: 2 + reset-names: + items: + - const: link + - const: phy + - if: + properties: + compatible: + contains: + enum: + - socionext,uniphier-pxs3-usb3-ssphy + - socionext,uniphier-nx1-usb3-ssphy + then: + properties: + clocks: + minItems: 2 + maxItems: 3 + clock-names: + minItems: 2 + items: + - const: link + - const: phy + - const: phy-ext + resets: + minItems: 2 + maxItems: 2 + reset-names: + items: + - const: link + - const: phy + required: - compatible - reg
Instead of "oneOf:" choices, use "allOf:" and "if:" to define clocks, clock-names, resets, and reset-names that can be taken by the compatible string. The order of clock-names and reset-names doesn't change here. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> --- .../phy/socionext,uniphier-ahci-phy.yaml | 90 +++++++++++++----- .../phy/socionext,uniphier-pcie-phy.yaml | 47 ++++++--- .../phy/socionext,uniphier-usb3hs-phy.yaml | 93 ++++++++++++++---- .../phy/socionext,uniphier-usb3ss-phy.yaml | 95 +++++++++++++++---- 4 files changed, 251 insertions(+), 74 deletions(-)