| Message ID | 20210705102318.102999-2-chanho61.park@samsung.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Support exynosauto ufs phy driver | expand |
On 05/07/2021 12:23, Chanho Park wrote: > To support custom PHY_TSRV_CH_OFFSET for ExynosAuto v9 series SoC, > we can add PHY_TRSV_REG_CFG_OFFSET macro which has an offset field and > let it be used from PHY_TRSV_REG_CFG with the default value. > > Signed-off-by: Chanho Park <chanho61.park@samsung.com> > --- > drivers/phy/samsung/phy-samsung-ufs.h | 7 +++++-- > 1 file changed, 5 insertions(+), 2 deletions(-) Hi Chanho, Thanks for the patches. I think this should be squashed into your next patch - it does not make much sense as standalone commit. Best regards, Krzysztof
> Thanks for the patches. I think this should be squashed into your next > patch - it does not make much sense as standalone commit. > Okay. I'll squash it next patchset. Thanks. Best Regards, Chanho Park
diff --git a/drivers/phy/samsung/phy-samsung-ufs.h b/drivers/phy/samsung/phy-samsung-ufs.h index 5de78710524c..ea1ac38889c1 100644 --- a/drivers/phy/samsung/phy-samsung-ufs.h +++ b/drivers/phy/samsung/phy-samsung-ufs.h @@ -24,14 +24,17 @@ .id = PHY_COMN_BLK, \ } -#define PHY_TRSV_REG_CFG(o, v, d) { \ +#define PHY_TRSV_REG_CFG_OFFSET(o, v, d, c) { \ .off_0 = PHY_APB_ADDR((o)), \ - .off_1 = PHY_APB_ADDR((o) + PHY_TRSV_CH_OFFSET), \ + .off_1 = PHY_APB_ADDR((o) + (c)), \ .val = (v), \ .desc = (d), \ .id = PHY_TRSV_BLK, \ } +#define PHY_TRSV_REG_CFG(o, v, d) \ + PHY_TRSV_REG_CFG_OFFSET(o, v, d, PHY_TRSV_CH_OFFSET) + /* UFS PHY registers */ #define PHY_PLL_LOCK_STATUS 0x1e #define PHY_CDR_LOCK_STATUS 0x5e
To support custom PHY_TSRV_CH_OFFSET for ExynosAuto v9 series SoC, we can add PHY_TRSV_REG_CFG_OFFSET macro which has an offset field and let it be used from PHY_TRSV_REG_CFG with the default value. Signed-off-by: Chanho Park <chanho61.park@samsung.com> --- drivers/phy/samsung/phy-samsung-ufs.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-)