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[1/4] dt-bindings: mfd: brcm,cru: add clkset syscon

Message ID 20210913080024.6951-1-zajec5@gmail.com
State Not Applicable
Headers show
Series [1/4] dt-bindings: mfd: brcm,cru: add clkset syscon | expand

Commit Message

Rafał Miłecki Sept. 13, 2021, 8 a.m. UTC 
From: Rafał Miłecki <rafal@milecki.pl>

CRU has a shared register that is used e.g. to control USB 2.0 PHY block
access. It's a single 32 b register. Document it as syscon so it can be
used with a regmap.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
 Documentation/devicetree/bindings/mfd/brcm,cru.yaml | 8 ++++++++
 Documentation/devicetree/bindings/mfd/syscon.yaml   | 1 +
 2 files changed, 9 insertions(+)

Comments

Rob Herring (Arm) Sept. 21, 2021, 8:19 p.m. UTC | #1 
On Mon, 13 Sep 2021 10:00:21 +0200, Rafał Miłecki wrote:
> From: Rafał Miłecki <rafal@milecki.pl>
> 
> CRU has a shared register that is used e.g. to control USB 2.0 PHY block
> access. It's a single 32 b register. Document it as syscon so it can be
> used with a regmap.
> 
> Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
> ---
>  Documentation/devicetree/bindings/mfd/brcm,cru.yaml | 8 ++++++++
>  Documentation/devicetree/bindings/mfd/syscon.yaml   | 1 +
>  2 files changed, 9 insertions(+)
> 

Reviewed-by: Rob Herring <robh@kernel.org>
Lee Jones Sept. 22, 2021, 7:57 a.m. UTC | #2 
On Mon, 13 Sep 2021, Rafał Miłecki wrote:

> From: Rafał Miłecki <rafal@milecki.pl>
> 
> CRU has a shared register that is used e.g. to control USB 2.0 PHY block
> access. It's a single 32 b register. Document it as syscon so it can be
> used with a regmap.
> 
> Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
> ---
>  Documentation/devicetree/bindings/mfd/brcm,cru.yaml | 8 ++++++++
>  Documentation/devicetree/bindings/mfd/syscon.yaml   | 1 +
>  2 files changed, 9 insertions(+)

Applied, thanks.
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/mfd/brcm,cru.yaml b/Documentation/devicetree/bindings/mfd/brcm,cru.yaml
index fc1317ab3226..bf4e585d3c18 100644
--- a/Documentation/devicetree/bindings/mfd/brcm,cru.yaml
+++ b/Documentation/devicetree/bindings/mfd/brcm,cru.yaml
@@ -39,6 +39,9 @@  patternProperties:
   '^clock-controller@[a-f0-9]+$':
     $ref: ../clock/brcm,iproc-clocks.yaml
 
+  '^syscon@[a-f0-9]+$':
+    $ref: syscon.yaml
+
   '^thermal@[a-f0-9]+$':
     $ref: ../thermal/brcm,ns-thermal.yaml
 
@@ -73,6 +76,11 @@  examples:
                                  "iprocfast", "sata1", "sata2";
         };
 
+        syscon@180 {
+            compatible = "brcm,cru-clkset", "syscon";
+            reg = <0x180 0x4>;
+        };
+
         pinctrl {
             compatible = "brcm,bcm4708-pinmux";
             offset = <0x1c0>;
diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
index abe3fd817e0b..0dcffc273c2b 100644
--- a/Documentation/devicetree/bindings/mfd/syscon.yaml
+++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
@@ -38,6 +38,7 @@  properties:
               - allwinner,sun8i-h3-system-controller
               - allwinner,sun8i-v3s-system-controller
               - allwinner,sun50i-a64-system-controller
+              - brcm,cru-clkset
               - hisilicon,dsa-subctrl
               - hisilicon,hi6220-sramctrl
               - hisilicon,pcie-sas-subctrl