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[80.251.214.228]) by smtp.gmail.com with ESMTPSA id o8sm14550651pjh.19.2021.09.26.21.49.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 26 Sep 2021 21:49:08 -0700 (PDT) From: Shawn Guo To: Vinod Koul , Bjorn Andersson Cc: Manu Gautam , AngeloGioacchino Del Regno , Konrad Dybcio , Jeffrey Hugo , Jami Kettunen , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Shawn Guo Subject: [PATCH 1/3] dt-bindings: phy: qcom,qusb2: Add missing vdd-supply Date: Mon, 27 Sep 2021 12:48:22 +0800 Message-Id: <20210927044824.30246-2-shawn.guo@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210927044824.30246-1-shawn.guo@linaro.org> References: <20210927044824.30246-1-shawn.guo@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210926_214909_478389_1E150C79 X-CRM114-Status: UNSURE ( 8.29 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org Besides vdda-pll and vdda-phy-dpdm, vdd-supply is a required supply for PHY digital circuit operation. Add it for correctness and completeness. Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml index 48ae604b2194..96e31f582fc9 100644 --- a/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml @@ -51,6 +51,10 @@ properties: - const: ref - const: iface + vdda-supply: + description: + Phandle to 0.9V regulator supply to PHY digital circuit. + vdda-pll-supply: description: Phandle to 1.8V regulator supply to PHY refclk pll block. @@ -157,6 +161,7 @@ required: - "#phy-cells" - clocks - clock-names + - vdd-supply - vdda-pll-supply - vdda-phy-dpdm-supply - resets @@ -175,6 +180,7 @@ examples: <&gcc GCC_RX1_USB2_CLKREF_CLK>; clock-names = "cfg_ahb", "ref"; + vdd-supply = <&pm8994_l28>; vdda-pll-supply = <&pm8994_l12>; vdda-phy-dpdm-supply = <&pm8994_l24>;