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[95.114.61.215]) by smtp.googlemail.com with ESMTPSA id f13-20020a170906824d00b00726e108b566sm622871ejx.173.2022.06.28.05.45.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Jun 2022 05:45:18 -0700 (PDT) From: Martin Blumenstingl To: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, p.zabel@pengutronix.de Cc: linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, vkoul@kernel.org, kishon@ti.com, rtanwar@maxlinear.com, Martin Blumenstingl Subject: [PATCH v1 2/9] dt-bindings: reset: intel,rcu-gw: Allow up to three global reset items Date: Tue, 28 Jun 2022 14:44:34 +0200 Message-Id: <20220628124441.2385023-3-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220628124441.2385023-1-martin.blumenstingl@googlemail.com> References: <20220628124441.2385023-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220628_054521_247750_FF448DAD X-CRM114-Status: GOOD ( 10.39 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org Legacy SoCs use three elements for the global reset: - offset - reset bit - status bit Allow this in the dt-bindings as well. Fixes: b7ab0cb00d086b ("dt-bindings: reset: Add YAML schemas for the Intel Reset controller") Signed-off-by: Martin Blumenstingl Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml b/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml index 13bf6bb3f097..be64f8597710 100644 --- a/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml +++ b/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml @@ -22,11 +22,15 @@ properties: intel,global-reset: description: Global reset register offset and bit offset. $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 2 items: - description: Register offset - description: Register bit offset minimum: 0 maximum: 31 + - description: Status bit offset (only if "#reset-cells" is 3) + minimum: 0 + maximum: 31 "#reset-cells": minimum: 2