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Miller" , Jakub Kicinski , Madalin Bucur , netdev@vger.kernel.org Cc: Paolo Abeni , Eric Dumazet , linux-arm-kernel@lists.infradead.org, Russell King , linux-kernel@vger.kernel.org, Sean Anderson , Kishon Vijay Abraham I , Krzysztof Kozlowski , Li Yang , Rob Herring , Shawn Guo , Vinod Koul , devicetree@vger.kernel.org, linux-phy@lists.infradead.org Subject: [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: Add serdes bindings Date: Fri, 15 Jul 2022 17:59:53 -0400 Message-Id: <20220715215954.1449214-47-sean.anderson@seco.com> X-Mailer: git-send-email 2.35.1.1320.gc452695387.dirty In-Reply-To: <20220715215954.1449214-1-sean.anderson@seco.com> References: <20220715215954.1449214-1-sean.anderson@seco.com> X-ClientProxiedBy: CH2PR10CA0009.namprd10.prod.outlook.com (2603:10b6:610:4c::19) To VI1PR03MB4973.eurprd03.prod.outlook.com (2603:10a6:803:c5::12) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 5f0a7233-c57b-448a-5040-08da66ada4ad X-MS-TrafficTypeDiagnostic: DB8PR03MB6251:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: cmZOeLufuia9+gFlaFTjNEX0v77Ni5Jd5tMDyctrv1qhX3UBKR49MuZTrm+NpZTDSZp6VGjt6csCpG6Q8o7FAiCKbbeOjva7GwxF46sx0AM7BJAx+HIQfxqdzCijAM3J589YQUGAT1tS+vB0BseM8c5w6uWR2g1xeJC8bXWp7INK9WBPV2JdlUQnmloYk+qVfXQn2puQJW3P+l3cPrG4I8QSYtYlgiqhMm1r8gWJr4nHDGwZqnmHmjfTBIRTzYL93O8Za3I+Rb3WIyyICQGTQKgrzMRq2ywWopfJwU3MShHuBeGhVRcEfayMDEOZRIg2wc/ETzSsgB2cxUOfI+CId/FH0n3cqbWCoaDv5r1kjW0laNgLPzV9+KAqH5qgZhl+TFzYagA7WGeLA/V8Gt4zXiXynK1dzN+vkkrOW3kZrBZRuk+aSPXWlWnRtpOPJCpUPwLofv62d3KffYtcxHi1t1NZGTw8nPd2IIPo2Jl6oVx/tv5dOSxlpLHiZswdmby7didj6Ijx140PdZz/SqpqiwRdSeq81KD6WSubGirGKL5hSpZKqNDz3sLc87XG+LBmx8sj5RKcQiJb1LlpxW5Wa+UPrKJuyVoqzv0og7pfCuN5PFo1OVH1MbukeVcFJM53F++pdDZIzh6a/WBWiyQTzmK40jGR3ZyNcyngKid8KgVEHlWLqRfYhHGoNaFnEf0EGZTSC15xuXfWJjqYWRxaJTHGpOQBHY+q6sBzkZgC7D7WD6PTFYQAeM6mIf2lI91taihDmqsi0IM5xijtVa/5wWrG/u8qEvy+W3NIQYTVNOnMmsdGUeeWZo3Fn2ndT+yzSNyhJMqQ4O72HEvlTdxiq+mLKDu25xLZqHcIJRkkN12jCgSKk8KQ7hZaZ60Mjg0tcm4szytKLqocIp6fU0r9cNjoLiQrj6mu8FToRyxjC+31LmKdARWHo9fUCn8QO98BJLe+xMHfwxJXB38Ea95M4ilAinsZ8KNjgWB+RnoPtTI2d6rpe3qxfydoQ9IdQI4N901iRzzrVgeAdWAFghSnpS4CWbEAvbvWFIy9NhlhxZqO/6ArYWFbTOQ4X/bSKLNbwZSOG70TlQfqwMn5ugv8yyoMJdicDsQ8jYl7IoPMwAeysLAy1EbHjE0/cH8LweBQXxfAKY9KiC9lqiwrVpFknrjFkPWgMauMBVGeJUiYgCAJMieO4nlvZgXVcKsrh9w6OdTaEafBKshT5YvGt9U89spko4EOy1QiNQf/5YsgMhj5i1tUdW/DBT7Mb7ZbDnfugI8VcOQurDo8l0U4FNrqWiVsknEDYJSDR+zsdSnUcrjvFvVtRkqFcsb4Pzoyuc06pNrkNFdVllLOuQTikGtri+jln+VHBpMgTOF9Y7N2MYxW2jNwSZ6dWuK6LPzsFYg8XyxAW4el9FsECxNobYg+IC4pudAQfOMkvHmcOIRr0R2bEnGngDiSWpUQEKR0ei0X6BNtvrT5jqboj2U6sq8Z3OcGbik/8ijXwTAvfe1vcDFo/Moo09RA+NSSluvkaIjdT8MvcHVy8/waTB8hDoklURIahtKOUcQ6+tByx4o6v5lTNeQDQLl6DXP+xwzEfUAXLDfBKKC0R28LTosVqj1ymA== X-OriginatorOrg: seco.com X-MS-Exchange-CrossTenant-Network-Message-Id: 5f0a7233-c57b-448a-5040-08da66ada4ad X-MS-Exchange-CrossTenant-AuthSource: VI1PR03MB4973.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Jul 2022 22:02:00.5637 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: bebe97c3-6438-442e-ade3-ff17aa50e733 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: PkMtSP10LVhPLxJtdelb1HQ86dB7zf7P3c4AjeHA0MlMHybELEC2YtpubcLTBgI03pwK8tr6PZGAkiXclrReZA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB8PR03MB6251 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220715_150206_506776_5FEDE821 X-CRM114-Status: GOOD ( 15.00 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org This adds appropriate bindings for the macs which use the SerDes. The 156.25MHz fixed clock is a crystal. The 100MHz clocks (there are actually 3) come from a Renesas 6V49205B at address 69 on i2c0. There is no driver for this device (and as far as I know all you can do with the 100MHz clocks is gate them), so I have chosen to model it as a single fixed clock. Note: the SerDes1 lane numbering for the LS1046A is *reversed*. This means that Lane A (what the driver thinks is lane 0) uses pins SD1_TX3_P/N. Because this will break ethernet if the serdes is not enabled, enable the serdes driver by default on Layerscape. Signed-off-by: Sean Anderson Signed-off-by: Sean Anderson --- Please let me know if there is a better/more specific config I can use here. (no changes since v1) .../boot/dts/freescale/fsl-ls1046a-rdb.dts | 34 +++++++++++++++++++ drivers/phy/freescale/Kconfig | 1 + 2 files changed, 35 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts index 7025aad8ae89..4f4dd0ed8c53 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts @@ -26,6 +26,32 @@ aliases { chosen { stdout-path = "serial0:115200n8"; }; + + clocks { + clk_100mhz: clock-100mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + }; + + clk_156mhz: clock-156mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <156250000>; + }; + }; +}; + +&serdes1 { + clocks = <&clk_100mhz>, <&clk_156mhz>; + clock-names = "ref0", "ref1"; + status = "okay"; +}; + +&serdes2 { + clocks = <&clk_100mhz>, <&clk_100mhz>; + clock-names = "ref0", "ref1"; + status = "okay"; }; &duart0 { @@ -140,21 +166,29 @@ ethernet@e6000 { ethernet@e8000 { phy-handle = <&sgmii_phy1>; phy-connection-type = "sgmii"; + phys = <&serdes1 1>; + phy-names = "serdes"; }; ethernet@ea000 { phy-handle = <&sgmii_phy2>; phy-connection-type = "sgmii"; + phys = <&serdes1 0>; + phy-names = "serdes"; }; ethernet@f0000 { /* 10GEC1 */ phy-handle = <&aqr106_phy>; phy-connection-type = "xgmii"; + phys = <&serdes1 3>; + phy-names = "serdes"; }; ethernet@f2000 { /* 10GEC2 */ fixed-link = <0 1 1000 0 0>; phy-connection-type = "xgmii"; + phys = <&serdes1 2>; + phy-names = "serdes"; }; mdio@fc000 { diff --git a/drivers/phy/freescale/Kconfig b/drivers/phy/freescale/Kconfig index fe2a3efe0ba4..9595666213d0 100644 --- a/drivers/phy/freescale/Kconfig +++ b/drivers/phy/freescale/Kconfig @@ -43,6 +43,7 @@ config PHY_FSL_LYNX_10G tristate "Freescale Layerscale Lynx 10G SerDes support" select GENERIC_PHY select REGMAP_MMIO + default y if ARCH_LAYERSCAPE help This adds support for the Lynx "SerDes" devices found on various QorIQ SoCs. There may be up to four SerDes devices on each SoC, and each