From patchwork Mon Oct 17 06:50:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 13008199 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1BFA8C4167B for ; Mon, 17 Oct 2022 06:50:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=MnvuIrBMYuSfapDNJl0zuYbs5zvqnggLjwzU29rKgeE=; b=3z/vDlKid8rNDS bouBiuVFm9xB6SpWYG4mPQtbvrwenDrL8dHPJ1Vgchxrn+130gLP2HsN4CKA2PQAb8J80dydQGxw9 dyPntmG4O3OfIby/kdd8onCnRvveqBeHViMKg4J59IlEsswoFdqWe8bF5vqy2E14JkFXTmSFPhCP/ B7KiNcMfcuEYr3GGXFn1IL+9IQVT39PkSzPLEOpsgsDyJ/XWTkiwtH/LBaZW8gcICYkcBJqTHVGPP lvopcZh+91x8gpFrJt61PumEQ+UamwtwynB8m0oSQp7/eR4cHHnyP96hhwQsItreo5xEFf/RhL8GT hyHPnt1TeKwJ1zUECZTw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1okJxa-0089AD-G5; Mon, 17 Oct 2022 06:50:50 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1okJxU-00890m-N0 for linux-phy@lists.infradead.org; Mon, 17 Oct 2022 06:50:47 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id ACB8F60F4B; Mon, 17 Oct 2022 06:50:42 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 347ECC43159; Mon, 17 Oct 2022 06:50:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1665989441; bh=n0OqNs+38YD2gubBXOfcUP6aY+cSEz5qKt4TCInVZ+o=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Q3aQlWFsZ4lSEoADUpAPFXmRWzjGiyFIwQbytiGbCaOk6I3hjUfTcn4ulY0yMzPo4 1X3hWDavHG6lVht7lW/60Sc5oH0ug1fLmmKccwFtkpNzxBXk+jFqw/Gsm6/5qS+Iba BONmj1+vIddzO/Naq6yV3yRWk9O7v13z3x/iRr0X+YBfQXdNdwl4esRC5NWNELNbWC VXDgjBe38w+ha1uAhBTnQ432FI0EK1nRc5Acy0W6FArnkUB14mYzic6oyZnJznOrF+ bxU4VHDXGluUNQOSl9y6IHqtlQ2u9BR22vKx4jQ+96RKkX3mNMQcbSmMCV+EUy1g+R nRsD7QU26eY9g== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1okJxG-00057o-Rk; Mon, 17 Oct 2022 08:50:30 +0200 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v3 08/11] phy: qcom-qmp-ufs: clean up power-down handling Date: Mon, 17 Oct 2022 08:50:10 +0200 Message-Id: <20221017065013.19647-9-johan+linaro@kernel.org> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221017065013.19647-1-johan+linaro@kernel.org> References: <20221017065013.19647-1-johan+linaro@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221016_235044_928299_314747B5 X-CRM114-Status: GOOD ( 12.50 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org Always define the POWER_DOWN_CONTROL register instead of falling back to the v2 (and v4) offset during power on and power off. Reviewed-by: Dmitry Baryshkov Signed-off-by: Johan Hovold --- drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 22 ++++++++-------------- 1 file changed, 8 insertions(+), 14 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c index db5642e1f715..e28c45ab74ea 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c @@ -89,22 +89,26 @@ enum qphy_reg_layout { static const unsigned int msm8996_ufsphy_regs_layout[QPHY_LAYOUT_SIZE] = { [QPHY_START_CTRL] = 0x00, [QPHY_PCS_READY_STATUS] = 0x168, + [QPHY_PCS_POWER_DOWN_CONTROL] = 0x04, }; static const unsigned int sdm845_ufsphy_regs_layout[QPHY_LAYOUT_SIZE] = { [QPHY_START_CTRL] = 0x00, [QPHY_PCS_READY_STATUS] = 0x160, + [QPHY_PCS_POWER_DOWN_CONTROL] = 0x04, }; static const unsigned int sm6115_ufsphy_regs_layout[QPHY_LAYOUT_SIZE] = { [QPHY_START_CTRL] = 0x00, [QPHY_PCS_READY_STATUS] = 0x168, + [QPHY_PCS_POWER_DOWN_CONTROL] = 0x04, }; static const unsigned int sm8150_ufsphy_regs_layout[QPHY_LAYOUT_SIZE] = { [QPHY_START_CTRL] = QPHY_V4_PCS_UFS_PHY_START, [QPHY_PCS_READY_STATUS] = QPHY_V4_PCS_UFS_READY_STATUS, [QPHY_SW_RESET] = QPHY_V4_PCS_UFS_SW_RESET, + [QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V4_PCS_UFS_POWER_DOWN_CONTROL, }; static const struct qmp_phy_init_tbl msm8996_ufs_serdes_tbl[] = { @@ -856,13 +860,8 @@ static int qmp_ufs_com_init(struct qmp_phy *qphy) if (ret) goto err_disable_regulators; - if (cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL]) - qphy_setbits(pcs, - cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], - cfg->pwrdn_ctrl); - else - qphy_setbits(pcs, QPHY_V2_PCS_POWER_DOWN_CONTROL, - cfg->pwrdn_ctrl); + qphy_setbits(pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], + cfg->pwrdn_ctrl); return 0; @@ -996,13 +995,8 @@ static int qmp_ufs_power_off(struct phy *phy) qphy_clrbits(qphy->pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl); /* Put PHY into POWER DOWN state: active low */ - if (cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL]) { - qphy_clrbits(qphy->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], - cfg->pwrdn_ctrl); - } else { - qphy_clrbits(qphy->pcs, QPHY_V2_PCS_POWER_DOWN_CONTROL, - cfg->pwrdn_ctrl); - } + qphy_clrbits(qphy->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], + cfg->pwrdn_ctrl); return 0; }