| Message ID | 20221018-clk-range-checks-fixes-v2-56-f6736dec138e@cerno.tech |
|---|---|
| State | Handled Elsewhere |
| Headers | show |
| Series | clk: Make determine_rate mandatory for muxes | expand |
Hi Maxime, Le ven. 4 nov. 2022 à 14:18:13 +0100, Maxime Ripard <maxime@cerno.tech> a écrit : > The Ingenic CGU clocks implements a mux with a set_parent hook, but > doesn't provide a determine_rate implementation. > > This is a bit odd, since set_parent() is there to, as its name > implies, > change the parent of a clock. However, the most likely candidate to > trigger that parent change is a call to clk_set_rate(), with > determine_rate() figuring out which parent is the best suited for a > given rate. > > The other trigger would be a call to clk_set_parent(), but it's far > less > used, and it doesn't look like there's any obvious user for that > clock. > > So, the set_parent hook is effectively unused, possibly because of an > oversight. However, it could also be an explicit decision by the > original author to avoid any reparenting but through an explicit call > to > clk_set_parent(). > > The driver does implement round_rate() though, which means that we can > change the rate of the clock, but we will never get to change the > parent. > > However, It's hard to tell whether it's been done on purpose or not. > > Since we'll start mandating a determine_rate() implementation, let's > convert the round_rate() implementation to a determine_rate(), which > will also make the current behavior explicit. And if it was an > oversight, the clock behaviour can be adjusted later on. So it's partly on purpose, partly because I didn't know about .determine_rate. There's nothing odd about having a lonely .set_parent callback; in my case the clocks are parented from the device tree. Having the clocks driver trigger a parent change when requesting a rate change sounds very dangerous, IMHO. My MMC controller can be parented to the external 48 MHz oscillator, and if the card requests 50 MHz, it could switch to one of the PLLs. That works as long as the PLLs don't change rate, but if one is configured as driving the CPU clock, it becomes messy. The thing is, the clocks driver has no way to know whether or not it is "safe" to use a designated parent. For that reason, in practice, I never actually want to have a clock re-parented - it's almost always a bad idea vs. sticking to the parent clock configured in the DTS. > Signed-off-by: Maxime Ripard <maxime@cerno.tech> > --- > drivers/clk/ingenic/cgu.c | 15 ++++++++------- > 1 file changed, 8 insertions(+), 7 deletions(-) > > diff --git a/drivers/clk/ingenic/cgu.c b/drivers/clk/ingenic/cgu.c > index 1f7ba30f5a1b..0c9c8344ad11 100644 > --- a/drivers/clk/ingenic/cgu.c > +++ b/drivers/clk/ingenic/cgu.c > @@ -491,22 +491,23 @@ ingenic_clk_calc_div(struct clk_hw *hw, > return div; > } > > -static long > -ingenic_clk_round_rate(struct clk_hw *hw, unsigned long req_rate, > - unsigned long *parent_rate) > +static int ingenic_clk_determine_rate(struct clk_hw *hw, > + struct clk_rate_request *req) > { > struct ingenic_clk *ingenic_clk = to_ingenic_clk(hw); > const struct ingenic_cgu_clk_info *clk_info = > to_clk_info(ingenic_clk); > unsigned int div = 1; > > if (clk_info->type & CGU_CLK_DIV) > - div = ingenic_clk_calc_div(hw, clk_info, *parent_rate, req_rate); > + div = ingenic_clk_calc_div(hw, clk_info, req->best_parent_rate, > + req->rate); Sorry but I'm not sure that this works. You replace the "parent_rate" with the "best_parent_rate", and that means you only check the requested rate vs. the parent with the highest frequency, and not vs. the actual parent that will be used. Cheers, -Paul > else if (clk_info->type & CGU_CLK_FIXDIV) > div = clk_info->fixdiv.div; > else if (clk_hw_can_set_rate_parent(hw)) > - *parent_rate = req_rate; > + req->best_parent_rate = req->rate; > > - return DIV_ROUND_UP(*parent_rate, div); > + req->rate = DIV_ROUND_UP(req->best_parent_rate, div); > + return 0; > } > > static inline int ingenic_clk_check_stable(struct ingenic_cgu *cgu, > @@ -626,7 +627,7 @@ static const struct clk_ops ingenic_clk_ops = { > .set_parent = ingenic_clk_set_parent, > > .recalc_rate = ingenic_clk_recalc_rate, > - .round_rate = ingenic_clk_round_rate, > + .determine_rate = ingenic_clk_determine_rate, > .set_rate = ingenic_clk_set_rate, > > .enable = ingenic_clk_enable, > > -- > b4 0.11.0-dev-99e3a
Hi Paul, On Fri, Nov 04, 2022 at 02:31:20PM +0000, Paul Cercueil wrote: > Le ven. 4 nov. 2022 à 14:18:13 +0100, Maxime Ripard <maxime@cerno.tech> a > écrit : > > The Ingenic CGU clocks implements a mux with a set_parent hook, but > > doesn't provide a determine_rate implementation. > > > > This is a bit odd, since set_parent() is there to, as its name implies, > > change the parent of a clock. However, the most likely candidate to > > trigger that parent change is a call to clk_set_rate(), with > > determine_rate() figuring out which parent is the best suited for a > > given rate. > > > > The other trigger would be a call to clk_set_parent(), but it's far less > > used, and it doesn't look like there's any obvious user for that clock. > > > > So, the set_parent hook is effectively unused, possibly because of an > > oversight. However, it could also be an explicit decision by the > > original author to avoid any reparenting but through an explicit call to > > clk_set_parent(). > > > > The driver does implement round_rate() though, which means that we can > > change the rate of the clock, but we will never get to change the > > parent. > > > > However, It's hard to tell whether it's been done on purpose or not. > > > > Since we'll start mandating a determine_rate() implementation, let's > > convert the round_rate() implementation to a determine_rate(), which > > will also make the current behavior explicit. And if it was an > > oversight, the clock behaviour can be adjusted later on. > > So it's partly on purpose, partly because I didn't know about > .determine_rate. > > There's nothing odd about having a lonely .set_parent callback; in my case > the clocks are parented from the device tree. > > Having the clocks driver trigger a parent change when requesting a rate > change sounds very dangerous, IMHO. My MMC controller can be parented to the > external 48 MHz oscillator, and if the card requests 50 MHz, it could switch > to one of the PLLs. That works as long as the PLLs don't change rate, but if > one is configured as driving the CPU clock, it becomes messy. > The thing is, the clocks driver has no way to know whether or not it is > "safe" to use a designated parent. > > For that reason, in practice, I never actually want to have a clock > re-parented - it's almost always a bad idea vs. sticking to the parent clock > configured in the DTS. Yeah, and this is totally fine. But we need to be explicit about it. The determine_rate implementation I did in all the patches is an exact equivalent to the round_rate one if there was one. We will never ask to change the parent. Given what you just said, I would suggest to set the CLK_SET_RATE_NO_REPARENT flag as well. > > > Signed-off-by: Maxime Ripard <maxime@cerno.tech> > > --- > > drivers/clk/ingenic/cgu.c | 15 ++++++++------- > > 1 file changed, 8 insertions(+), 7 deletions(-) > > > > diff --git a/drivers/clk/ingenic/cgu.c b/drivers/clk/ingenic/cgu.c > > index 1f7ba30f5a1b..0c9c8344ad11 100644 > > --- a/drivers/clk/ingenic/cgu.c > > +++ b/drivers/clk/ingenic/cgu.c > > @@ -491,22 +491,23 @@ ingenic_clk_calc_div(struct clk_hw *hw, > > return div; > > } > > > > -static long > > -ingenic_clk_round_rate(struct clk_hw *hw, unsigned long req_rate, > > - unsigned long *parent_rate) > > +static int ingenic_clk_determine_rate(struct clk_hw *hw, > > + struct clk_rate_request *req) > > { > > struct ingenic_clk *ingenic_clk = to_ingenic_clk(hw); > > const struct ingenic_cgu_clk_info *clk_info = > > to_clk_info(ingenic_clk); > > unsigned int div = 1; > > > > if (clk_info->type & CGU_CLK_DIV) > > - div = ingenic_clk_calc_div(hw, clk_info, *parent_rate, req_rate); > > + div = ingenic_clk_calc_div(hw, clk_info, req->best_parent_rate, > > + req->rate); > > Sorry but I'm not sure that this works. > > You replace the "parent_rate" with the "best_parent_rate", and that means > you only check the requested rate vs. the parent with the highest frequency, > and not vs. the actual parent that will be used. best_parent_rate is initialized to the current parent rate, not the parent with the highest frequency: https://elixir.bootlin.com/linux/v6.1-rc3/source/drivers/clk/clk.c#L1471 Maxime
Maxime Ripard <maxime@cerno.tech> writes: > Hi Paul, > > On Fri, Nov 04, 2022 at 02:31:20PM +0000, Paul Cercueil wrote: >> Le ven. 4 nov. 2022 à 14:18:13 +0100, Maxime Ripard <maxime@cerno.tech> a >> écrit : >> > The Ingenic CGU clocks implements a mux with a set_parent hook, but >> > doesn't provide a determine_rate implementation. >> > >> > This is a bit odd, since set_parent() is there to, as its name implies, >> > change the parent of a clock. However, the most likely candidate to >> > trigger that parent change is a call to clk_set_rate(), with >> > determine_rate() figuring out which parent is the best suited for a >> > given rate. >> > >> > The other trigger would be a call to clk_set_parent(), but it's far less >> > used, and it doesn't look like there's any obvious user for that clock. >> > >> > So, the set_parent hook is effectively unused, possibly because of an >> > oversight. However, it could also be an explicit decision by the >> > original author to avoid any reparenting but through an explicit call to >> > clk_set_parent(). >> > >> > The driver does implement round_rate() though, which means that we can >> > change the rate of the clock, but we will never get to change the >> > parent. >> > >> > However, It's hard to tell whether it's been done on purpose or not. >> > >> > Since we'll start mandating a determine_rate() implementation, let's >> > convert the round_rate() implementation to a determine_rate(), which >> > will also make the current behavior explicit. And if it was an >> > oversight, the clock behaviour can be adjusted later on. >> >> So it's partly on purpose, partly because I didn't know about >> .determine_rate. >> >> There's nothing odd about having a lonely .set_parent callback; in my case >> the clocks are parented from the device tree. >> >> Having the clocks driver trigger a parent change when requesting a rate >> change sounds very dangerous, IMHO. My MMC controller can be parented to the >> external 48 MHz oscillator, and if the card requests 50 MHz, it could switch >> to one of the PLLs. That works as long as the PLLs don't change rate, but if >> one is configured as driving the CPU clock, it becomes messy. >> The thing is, the clocks driver has no way to know whether or not it is >> "safe" to use a designated parent. >> >> For that reason, in practice, I never actually want to have a clock >> re-parented - it's almost always a bad idea vs. sticking to the parent clock >> configured in the DTS. > > Yeah, and this is totally fine. But we need to be explicit about it. The > determine_rate implementation I did in all the patches is an exact > equivalent to the round_rate one if there was one. We will never ask to > change the parent. > > Given what you just said, I would suggest to set the > CLK_SET_RATE_NO_REPARENT flag as well. > Ideally there should be a way for drivers and the device tree to say, "clock X must be driven by clock Y", but the clock framework would be allowed to re-parent clocks freely as long as it doesn't violate any DT or driver constraints. That way allowing reparenting doesn't need to be an all-or-nothing thing, and it doesn't need to be decided at the clock driver level with special flags. Regards, Aidan >> > Signed-off-by: Maxime Ripard <maxime@cerno.tech> >> > --- >> > drivers/clk/ingenic/cgu.c | 15 ++++++++------- >> > 1 file changed, 8 insertions(+), 7 deletions(-) >> > >> > diff --git a/drivers/clk/ingenic/cgu.c b/drivers/clk/ingenic/cgu.c >> > index 1f7ba30f5a1b..0c9c8344ad11 100644 >> > --- a/drivers/clk/ingenic/cgu.c >> > +++ b/drivers/clk/ingenic/cgu.c >> > @@ -491,22 +491,23 @@ ingenic_clk_calc_div(struct clk_hw *hw, >> > return div; >> > } >> > >> > -static long >> > -ingenic_clk_round_rate(struct clk_hw *hw, unsigned long req_rate, >> > - unsigned long *parent_rate) >> > +static int ingenic_clk_determine_rate(struct clk_hw *hw, >> > + struct clk_rate_request *req) >> > { >> > struct ingenic_clk *ingenic_clk = to_ingenic_clk(hw); >> > const struct ingenic_cgu_clk_info *clk_info = >> > to_clk_info(ingenic_clk); >> > unsigned int div = 1; >> > >> > if (clk_info->type & CGU_CLK_DIV) >> > - div = ingenic_clk_calc_div(hw, clk_info, *parent_rate, req_rate); >> > + div = ingenic_clk_calc_div(hw, clk_info, req->best_parent_rate, >> > + req->rate); >> >> Sorry but I'm not sure that this works. >> >> You replace the "parent_rate" with the "best_parent_rate", and that means >> you only check the requested rate vs. the parent with the highest frequency, >> and not vs. the actual parent that will be used. > > best_parent_rate is initialized to the current parent rate, not the > parent with the highest frequency: > https://elixir.bootlin.com/linux/v6.1-rc3/source/drivers/clk/clk.c#L1471 > > Maxime
Hi Maxime, Le ven. 4 nov. 2022 à 15:59:46 +0100, Maxime Ripard <maxime@cerno.tech> a écrit : > Hi Paul, > > On Fri, Nov 04, 2022 at 02:31:20PM +0000, Paul Cercueil wrote: >> Le ven. 4 nov. 2022 à 14:18:13 +0100, Maxime Ripard >> <maxime@cerno.tech> a >> écrit : >> > The Ingenic CGU clocks implements a mux with a set_parent hook, >> but >> > doesn't provide a determine_rate implementation. >> > >> > This is a bit odd, since set_parent() is there to, as its name >> implies, >> > change the parent of a clock. However, the most likely candidate >> to >> > trigger that parent change is a call to clk_set_rate(), with >> > determine_rate() figuring out which parent is the best suited for >> a >> > given rate. >> > >> > The other trigger would be a call to clk_set_parent(), but it's >> far less >> > used, and it doesn't look like there's any obvious user for that >> clock. >> > >> > So, the set_parent hook is effectively unused, possibly because >> of an >> > oversight. However, it could also be an explicit decision by the >> > original author to avoid any reparenting but through an explicit >> call to >> > clk_set_parent(). >> > >> > The driver does implement round_rate() though, which means that >> we can >> > change the rate of the clock, but we will never get to change the >> > parent. >> > >> > However, It's hard to tell whether it's been done on purpose or >> not. >> > >> > Since we'll start mandating a determine_rate() implementation, >> let's >> > convert the round_rate() implementation to a determine_rate(), >> which >> > will also make the current behavior explicit. And if it was an >> > oversight, the clock behaviour can be adjusted later on. >> >> So it's partly on purpose, partly because I didn't know about >> .determine_rate. >> >> There's nothing odd about having a lonely .set_parent callback; in >> my case >> the clocks are parented from the device tree. >> >> Having the clocks driver trigger a parent change when requesting a >> rate >> change sounds very dangerous, IMHO. My MMC controller can be >> parented to the >> external 48 MHz oscillator, and if the card requests 50 MHz, it >> could switch >> to one of the PLLs. That works as long as the PLLs don't change >> rate, but if >> one is configured as driving the CPU clock, it becomes messy. >> The thing is, the clocks driver has no way to know whether or not >> it is >> "safe" to use a designated parent. >> >> For that reason, in practice, I never actually want to have a clock >> re-parented - it's almost always a bad idea vs. sticking to the >> parent clock >> configured in the DTS. > > Yeah, and this is totally fine. But we need to be explicit about it. > The > determine_rate implementation I did in all the patches is an exact > equivalent to the round_rate one if there was one. We will never ask > to > change the parent. > > Given what you just said, I would suggest to set the > CLK_SET_RATE_NO_REPARENT flag as well. But that would introduce policy into the driver... The fact that I don't want the MMC parented to the PLLs, doesn't mean that it's an invalid configuration per se. Cheers, -Paul >> >> > Signed-off-by: Maxime Ripard <maxime@cerno.tech> >> > --- >> > drivers/clk/ingenic/cgu.c | 15 ++++++++------- >> > 1 file changed, 8 insertions(+), 7 deletions(-) >> > >> > diff --git a/drivers/clk/ingenic/cgu.c b/drivers/clk/ingenic/cgu.c >> > index 1f7ba30f5a1b..0c9c8344ad11 100644 >> > --- a/drivers/clk/ingenic/cgu.c >> > +++ b/drivers/clk/ingenic/cgu.c >> > @@ -491,22 +491,23 @@ ingenic_clk_calc_div(struct clk_hw *hw, >> > return div; >> > } >> > >> > -static long >> > -ingenic_clk_round_rate(struct clk_hw *hw, unsigned long req_rate, >> > - unsigned long *parent_rate) >> > +static int ingenic_clk_determine_rate(struct clk_hw *hw, >> > + struct clk_rate_request *req) >> > { >> > struct ingenic_clk *ingenic_clk = to_ingenic_clk(hw); >> > const struct ingenic_cgu_clk_info *clk_info = >> > to_clk_info(ingenic_clk); >> > unsigned int div = 1; >> > >> > if (clk_info->type & CGU_CLK_DIV) >> > - div = ingenic_clk_calc_div(hw, clk_info, *parent_rate, >> req_rate); >> > + div = ingenic_clk_calc_div(hw, clk_info, req->best_parent_rate, >> > + req->rate); >> >> Sorry but I'm not sure that this works. >> >> You replace the "parent_rate" with the "best_parent_rate", and that >> means >> you only check the requested rate vs. the parent with the highest >> frequency, >> and not vs. the actual parent that will be used. > > best_parent_rate is initialized to the current parent rate, not the > parent with the highest frequency: > https://elixir.bootlin.com/linux/v6.1-rc3/source/drivers/clk/clk.c#L1471 > > Maxime
Hi, On Fri, Nov 04, 2022 at 05:35:29PM +0000, Aidan MacDonald wrote: > > Maxime Ripard <maxime@cerno.tech> writes: > > > Hi Paul, > > > > On Fri, Nov 04, 2022 at 02:31:20PM +0000, Paul Cercueil wrote: > >> Le ven. 4 nov. 2022 à 14:18:13 +0100, Maxime Ripard <maxime@cerno.tech> a > >> écrit : > >> > The Ingenic CGU clocks implements a mux with a set_parent hook, but > >> > doesn't provide a determine_rate implementation. > >> > > >> > This is a bit odd, since set_parent() is there to, as its name implies, > >> > change the parent of a clock. However, the most likely candidate to > >> > trigger that parent change is a call to clk_set_rate(), with > >> > determine_rate() figuring out which parent is the best suited for a > >> > given rate. > >> > > >> > The other trigger would be a call to clk_set_parent(), but it's far less > >> > used, and it doesn't look like there's any obvious user for that clock. > >> > > >> > So, the set_parent hook is effectively unused, possibly because of an > >> > oversight. However, it could also be an explicit decision by the > >> > original author to avoid any reparenting but through an explicit call to > >> > clk_set_parent(). > >> > > >> > The driver does implement round_rate() though, which means that we can > >> > change the rate of the clock, but we will never get to change the > >> > parent. > >> > > >> > However, It's hard to tell whether it's been done on purpose or not. > >> > > >> > Since we'll start mandating a determine_rate() implementation, let's > >> > convert the round_rate() implementation to a determine_rate(), which > >> > will also make the current behavior explicit. And if it was an > >> > oversight, the clock behaviour can be adjusted later on. > >> > >> So it's partly on purpose, partly because I didn't know about > >> .determine_rate. > >> > >> There's nothing odd about having a lonely .set_parent callback; in my case > >> the clocks are parented from the device tree. > >> > >> Having the clocks driver trigger a parent change when requesting a rate > >> change sounds very dangerous, IMHO. My MMC controller can be parented to the > >> external 48 MHz oscillator, and if the card requests 50 MHz, it could switch > >> to one of the PLLs. That works as long as the PLLs don't change rate, but if > >> one is configured as driving the CPU clock, it becomes messy. > >> The thing is, the clocks driver has no way to know whether or not it is > >> "safe" to use a designated parent. > >> > >> For that reason, in practice, I never actually want to have a clock > >> re-parented - it's almost always a bad idea vs. sticking to the parent clock > >> configured in the DTS. > > > > Yeah, and this is totally fine. But we need to be explicit about it. The > > determine_rate implementation I did in all the patches is an exact > > equivalent to the round_rate one if there was one. We will never ask to > > change the parent. > > > > Given what you just said, I would suggest to set the > > CLK_SET_RATE_NO_REPARENT flag as well. > > Ideally there should be a way for drivers and the device tree to > say, "clock X must be driven by clock Y", but the clock framework > would be allowed to re-parent clocks freely as long as it doesn't > violate any DT or driver constraints. I'm not really sure what you mean there, sorry. Isn't it what assigned-clock-parents/clk_set_parent() at probe, plus a determine_rate implementation that would affect best_parent_hw would already provide? > That way allowing reparenting doesn't need to be an all-or-nothing > thing, and it doesn't need to be decided at the clock driver level > with special flags. Like I said, the default implementation is already working to what you suggested if I understood properly. However, this has never been tested for any of the drivers in that series so I don't want to introduce (and debug ;)) regressions in all those drivers that were not setting any constraint but never actually tested their reparenting code. So that series is strictly equivalent to what you had before, it's just explicit now. If you find that some other decision make sense for your driver in particular cases, feel free to change it. I barely know most of these platforms, so I won't be able to make that decision (and test it) unfortunately. Maxime
Maxime Ripard <maxime@cerno.tech> writes: > Hi, > > On Fri, Nov 04, 2022 at 05:35:29PM +0000, Aidan MacDonald wrote: >> >> Maxime Ripard <maxime@cerno.tech> writes: >> >> > Hi Paul, >> > >> > On Fri, Nov 04, 2022 at 02:31:20PM +0000, Paul Cercueil wrote: >> >> Le ven. 4 nov. 2022 à 14:18:13 +0100, Maxime Ripard <maxime@cerno.tech> a >> >> écrit : >> >> > The Ingenic CGU clocks implements a mux with a set_parent hook, but >> >> > doesn't provide a determine_rate implementation. >> >> > >> >> > This is a bit odd, since set_parent() is there to, as its name implies, >> >> > change the parent of a clock. However, the most likely candidate to >> >> > trigger that parent change is a call to clk_set_rate(), with >> >> > determine_rate() figuring out which parent is the best suited for a >> >> > given rate. >> >> > >> >> > The other trigger would be a call to clk_set_parent(), but it's far less >> >> > used, and it doesn't look like there's any obvious user for that clock. >> >> > >> >> > So, the set_parent hook is effectively unused, possibly because of an >> >> > oversight. However, it could also be an explicit decision by the >> >> > original author to avoid any reparenting but through an explicit call to >> >> > clk_set_parent(). >> >> > >> >> > The driver does implement round_rate() though, which means that we can >> >> > change the rate of the clock, but we will never get to change the >> >> > parent. >> >> > >> >> > However, It's hard to tell whether it's been done on purpose or not. >> >> > >> >> > Since we'll start mandating a determine_rate() implementation, let's >> >> > convert the round_rate() implementation to a determine_rate(), which >> >> > will also make the current behavior explicit. And if it was an >> >> > oversight, the clock behaviour can be adjusted later on. >> >> >> >> So it's partly on purpose, partly because I didn't know about >> >> .determine_rate. >> >> >> >> There's nothing odd about having a lonely .set_parent callback; in my case >> >> the clocks are parented from the device tree. >> >> >> >> Having the clocks driver trigger a parent change when requesting a rate >> >> change sounds very dangerous, IMHO. My MMC controller can be parented to the >> >> external 48 MHz oscillator, and if the card requests 50 MHz, it could switch >> >> to one of the PLLs. That works as long as the PLLs don't change rate, but if >> >> one is configured as driving the CPU clock, it becomes messy. >> >> The thing is, the clocks driver has no way to know whether or not it is >> >> "safe" to use a designated parent. >> >> >> >> For that reason, in practice, I never actually want to have a clock >> >> re-parented - it's almost always a bad idea vs. sticking to the parent clock >> >> configured in the DTS. >> > >> > Yeah, and this is totally fine. But we need to be explicit about it. The >> > determine_rate implementation I did in all the patches is an exact >> > equivalent to the round_rate one if there was one. We will never ask to >> > change the parent. >> > >> > Given what you just said, I would suggest to set the >> > CLK_SET_RATE_NO_REPARENT flag as well. >> >> Ideally there should be a way for drivers and the device tree to >> say, "clock X must be driven by clock Y", but the clock framework >> would be allowed to re-parent clocks freely as long as it doesn't >> violate any DT or driver constraints. > > I'm not really sure what you mean there, sorry. Isn't it what > assigned-clock-parents/clk_set_parent() at probe, plus a determine_rate > implementation that would affect best_parent_hw would already provide? Assigning the parent clock in the DT works once, at boot, but going off what you wrote in the commit message, if the clock driver has a .determine_rate() implementation that *can* reparent clocks then it probably *will* reparent them, and the DT assignment will be lost. What I'm suggesting is a runtime constraint that the clock subsystem would enforce, and actively prevent drivers from changing the parent. Either explicitly with clk_set_parent() or due to .determine_rate(). That way you could write a .determine_rate() implementation that *can* select a better parent, but if the DT applies a constraint to fix the clock to a particular parent, the clock subsystem will force that parent to be used so you can be sure the clock is never reparented by accident. >> That way allowing reparenting doesn't need to be an all-or-nothing >> thing, and it doesn't need to be decided at the clock driver level >> with special flags. > > Like I said, the default implementation is already working to what you > suggested if I understood properly. However, this has never been tested > for any of the drivers in that series so I don't want to introduce (and > debug ;)) regressions in all those drivers that were not setting any > constraint but never actually tested their reparenting code. > > So that series is strictly equivalent to what you had before, it's just > explicit now. > > If you find that some other decision make sense for your driver in > particular cases, feel free to change it. I barely know most of these > platforms, so I won't be able to make that decision (and test it) > unfortunately. > > Maxime That's OK, I didn't review the patch, I'm just making a general suggestion. :)
Hi Paul, On Sat, Nov 05, 2022 at 10:33:54AM +0000, Paul Cercueil wrote: > Hi Maxime, > > Le ven. 4 nov. 2022 à 15:59:46 +0100, Maxime Ripard <maxime@cerno.tech> a > écrit : > > Hi Paul, > > > > On Fri, Nov 04, 2022 at 02:31:20PM +0000, Paul Cercueil wrote: > > > Le ven. 4 nov. 2022 à 14:18:13 +0100, Maxime Ripard > > > <maxime@cerno.tech> a > > > écrit : > > > > The Ingenic CGU clocks implements a mux with a set_parent hook, > > > but > > > > doesn't provide a determine_rate implementation. > > > > > > > > This is a bit odd, since set_parent() is there to, as its name > > > implies, > > > > change the parent of a clock. However, the most likely candidate > > > to > > > > trigger that parent change is a call to clk_set_rate(), with > > > > determine_rate() figuring out which parent is the best suited for > > > a > > > > given rate. > > > > > > > > The other trigger would be a call to clk_set_parent(), but it's > > > far less > > > > used, and it doesn't look like there's any obvious user for that > > > clock. > > > > > > > > So, the set_parent hook is effectively unused, possibly because > > > of an > > > > oversight. However, it could also be an explicit decision by the > > > > original author to avoid any reparenting but through an explicit > > > call to > > > > clk_set_parent(). > > > > > > > > The driver does implement round_rate() though, which means that > > > we can > > > > change the rate of the clock, but we will never get to change the > > > > parent. > > > > > > > > However, It's hard to tell whether it's been done on purpose or > > > not. > > > > > > > > Since we'll start mandating a determine_rate() implementation, > > > let's > > > > convert the round_rate() implementation to a determine_rate(), > > > which > > > > will also make the current behavior explicit. And if it was an > > > > oversight, the clock behaviour can be adjusted later on. > > > > > > So it's partly on purpose, partly because I didn't know about > > > .determine_rate. > > > > > > There's nothing odd about having a lonely .set_parent callback; in > > > my case > > > the clocks are parented from the device tree. > > > > > > Having the clocks driver trigger a parent change when requesting a > > > rate > > > change sounds very dangerous, IMHO. My MMC controller can be > > > parented to the > > > external 48 MHz oscillator, and if the card requests 50 MHz, it > > > could switch > > > to one of the PLLs. That works as long as the PLLs don't change > > > rate, but if > > > one is configured as driving the CPU clock, it becomes messy. > > > The thing is, the clocks driver has no way to know whether or not > > > it is > > > "safe" to use a designated parent. > > > > > > For that reason, in practice, I never actually want to have a clock > > > re-parented - it's almost always a bad idea vs. sticking to the > > > parent clock > > > configured in the DTS. > > > > Yeah, and this is totally fine. But we need to be explicit about it. The > > determine_rate implementation I did in all the patches is an exact > > equivalent to the round_rate one if there was one. We will never ask to > > change the parent. > > > > Given what you just said, I would suggest to set the > > CLK_SET_RATE_NO_REPARENT flag as well. > > But that would introduce policy into the driver... I'm not sure why you're bringing policies into that discussion. There's plenty of policy in the driver already, and the current code doesn't do something that the old wasn't doing (implicitly). And there's plenty of policies in drivers in general. Whether you limit the rate or not, whether you allow reparenting or not, even the CLK_SET_RATE_NO_REPARENT flag mentioned above is a policy decision set by drivers. > The fact that I don't want the MMC parented to the PLLs, doesn't mean > that it's an invalid configuration per se. Sure, and that's another policy :) Maxime
On Mon, Nov 07, 2022 at 08:57:22PM +0000, Aidan MacDonald wrote: > > Maxime Ripard <maxime@cerno.tech> writes: > > > Hi, > > > > On Fri, Nov 04, 2022 at 05:35:29PM +0000, Aidan MacDonald wrote: > >> > >> Maxime Ripard <maxime@cerno.tech> writes: > >> > >> > Hi Paul, > >> > > >> > On Fri, Nov 04, 2022 at 02:31:20PM +0000, Paul Cercueil wrote: > >> >> Le ven. 4 nov. 2022 à 14:18:13 +0100, Maxime Ripard <maxime@cerno.tech> a > >> >> écrit : > >> >> > The Ingenic CGU clocks implements a mux with a set_parent hook, but > >> >> > doesn't provide a determine_rate implementation. > >> >> > > >> >> > This is a bit odd, since set_parent() is there to, as its name implies, > >> >> > change the parent of a clock. However, the most likely candidate to > >> >> > trigger that parent change is a call to clk_set_rate(), with > >> >> > determine_rate() figuring out which parent is the best suited for a > >> >> > given rate. > >> >> > > >> >> > The other trigger would be a call to clk_set_parent(), but it's far less > >> >> > used, and it doesn't look like there's any obvious user for that clock. > >> >> > > >> >> > So, the set_parent hook is effectively unused, possibly because of an > >> >> > oversight. However, it could also be an explicit decision by the > >> >> > original author to avoid any reparenting but through an explicit call to > >> >> > clk_set_parent(). > >> >> > > >> >> > The driver does implement round_rate() though, which means that we can > >> >> > change the rate of the clock, but we will never get to change the > >> >> > parent. > >> >> > > >> >> > However, It's hard to tell whether it's been done on purpose or not. > >> >> > > >> >> > Since we'll start mandating a determine_rate() implementation, let's > >> >> > convert the round_rate() implementation to a determine_rate(), which > >> >> > will also make the current behavior explicit. And if it was an > >> >> > oversight, the clock behaviour can be adjusted later on. > >> >> > >> >> So it's partly on purpose, partly because I didn't know about > >> >> .determine_rate. > >> >> > >> >> There's nothing odd about having a lonely .set_parent callback; in my case > >> >> the clocks are parented from the device tree. > >> >> > >> >> Having the clocks driver trigger a parent change when requesting a rate > >> >> change sounds very dangerous, IMHO. My MMC controller can be parented to the > >> >> external 48 MHz oscillator, and if the card requests 50 MHz, it could switch > >> >> to one of the PLLs. That works as long as the PLLs don't change rate, but if > >> >> one is configured as driving the CPU clock, it becomes messy. > >> >> The thing is, the clocks driver has no way to know whether or not it is > >> >> "safe" to use a designated parent. > >> >> > >> >> For that reason, in practice, I never actually want to have a clock > >> >> re-parented - it's almost always a bad idea vs. sticking to the parent clock > >> >> configured in the DTS. > >> > > >> > Yeah, and this is totally fine. But we need to be explicit about it. The > >> > determine_rate implementation I did in all the patches is an exact > >> > equivalent to the round_rate one if there was one. We will never ask to > >> > change the parent. > >> > > >> > Given what you just said, I would suggest to set the > >> > CLK_SET_RATE_NO_REPARENT flag as well. > >> > >> Ideally there should be a way for drivers and the device tree to > >> say, "clock X must be driven by clock Y", but the clock framework > >> would be allowed to re-parent clocks freely as long as it doesn't > >> violate any DT or driver constraints. > > > > I'm not really sure what you mean there, sorry. Isn't it what > > assigned-clock-parents/clk_set_parent() at probe, plus a determine_rate > > implementation that would affect best_parent_hw would already provide? > > Assigning the parent clock in the DT works once, at boot, but going off > what you wrote in the commit message, if the clock driver has a > .determine_rate() implementation that *can* reparent clocks then it > probably *will* reparent them, and the DT assignment will be lost. Yes, indeed, but assigned-clock-parents never provided any sort of guarantee on whether or not the clock was allowed to reparent or not. It's just a one-off thing, right before probe, and a clk_set_parent() call at probe will override that just fine. Just like assigned-clock-rates isn't permanent. > What I'm suggesting is a runtime constraint that the clock subsystem > would enforce, and actively prevent drivers from changing the parent. > Either explicitly with clk_set_parent() or due to .determine_rate(). > > That way you could write a .determine_rate() implementation that *can* > select a better parent, but if the DT applies a constraint to fix the > clock to a particular parent, the clock subsystem will force that parent > to be used so you can be sure the clock is never reparented by accident. Yeah, that sounds like a good idea, and CLK_SET_RATE_NO_REPARENT isn't too far off from this, it's just ignored by clk_set_parent() for now. I guess we could rename CLK_SET_RATE_NO_REPARENT to CLK_NO_REPARENT, make clk_set_parent handle it, and set that flag whenever assigned-clock-parents is set on a clock. It's out of scope for this series though, and I certainly don't want to deal with all the regressions it might create :) Maxime
Hi Maxime, Le mer. 9 nov. 2022 à 11:53:01 +0100, Maxime Ripard <maxime@cerno.tech> a écrit : > Hi Paul, > > On Sat, Nov 05, 2022 at 10:33:54AM +0000, Paul Cercueil wrote: >> Hi Maxime, >> >> Le ven. 4 nov. 2022 à 15:59:46 +0100, Maxime Ripard >> <maxime@cerno.tech> a >> écrit : >> > Hi Paul, >> > >> > On Fri, Nov 04, 2022 at 02:31:20PM +0000, Paul Cercueil wrote: >> > > Le ven. 4 nov. 2022 à 14:18:13 +0100, Maxime Ripard >> > > <maxime@cerno.tech> a >> > > écrit : >> > > > The Ingenic CGU clocks implements a mux with a set_parent >> hook, >> > > but >> > > > doesn't provide a determine_rate implementation. >> > > > >> > > > This is a bit odd, since set_parent() is there to, as its >> name >> > > implies, >> > > > change the parent of a clock. However, the most likely >> candidate >> > > to >> > > > trigger that parent change is a call to clk_set_rate(), with >> > > > determine_rate() figuring out which parent is the best >> suited for >> > > a >> > > > given rate. >> > > > >> > > > The other trigger would be a call to clk_set_parent(), but >> it's >> > > far less >> > > > used, and it doesn't look like there's any obvious user for >> that >> > > clock. >> > > > >> > > > So, the set_parent hook is effectively unused, possibly >> because >> > > of an >> > > > oversight. However, it could also be an explicit decision by >> the >> > > > original author to avoid any reparenting but through an >> explicit >> > > call to >> > > > clk_set_parent(). >> > > > >> > > > The driver does implement round_rate() though, which means >> that >> > > we can >> > > > change the rate of the clock, but we will never get to >> change the >> > > > parent. >> > > > >> > > > However, It's hard to tell whether it's been done on purpose >> or >> > > not. >> > > > >> > > > Since we'll start mandating a determine_rate() >> implementation, >> > > let's >> > > > convert the round_rate() implementation to a >> determine_rate(), >> > > which >> > > > will also make the current behavior explicit. And if it was >> an >> > > > oversight, the clock behaviour can be adjusted later on. >> > > >> > > So it's partly on purpose, partly because I didn't know about >> > > .determine_rate. >> > > >> > > There's nothing odd about having a lonely .set_parent >> callback; in >> > > my case >> > > the clocks are parented from the device tree. >> > > >> > > Having the clocks driver trigger a parent change when >> requesting a >> > > rate >> > > change sounds very dangerous, IMHO. My MMC controller can be >> > > parented to the >> > > external 48 MHz oscillator, and if the card requests 50 MHz, it >> > > could switch >> > > to one of the PLLs. That works as long as the PLLs don't change >> > > rate, but if >> > > one is configured as driving the CPU clock, it becomes messy. >> > > The thing is, the clocks driver has no way to know whether or >> not >> > > it is >> > > "safe" to use a designated parent. >> > > >> > > For that reason, in practice, I never actually want to have a >> clock >> > > re-parented - it's almost always a bad idea vs. sticking to the >> > > parent clock >> > > configured in the DTS. >> > >> > Yeah, and this is totally fine. But we need to be explicit about >> it. The >> > determine_rate implementation I did in all the patches is an exact >> > equivalent to the round_rate one if there was one. We will never >> ask to >> > change the parent. >> > >> > Given what you just said, I would suggest to set the >> > CLK_SET_RATE_NO_REPARENT flag as well. >> >> But that would introduce policy into the driver... > > I'm not sure why you're bringing policies into that discussion. > There's > plenty of policy in the driver already, and the current code doesn't > do > something that the old wasn't doing (implicitly). Yes, I was just talking about the CLK_SET_RATE_NO_REPARENT flag adding policy. The fact that there's plenty of policy in the driver already is not an argument for adding some more. > And there's plenty of policies in drivers in general. Whether you > limit > the rate or not, whether you allow reparenting or not, even the > CLK_SET_RATE_NO_REPARENT flag mentioned above is a policy decision set > by drivers. Allowing reparenting and not limiting the rates is not a policy, it's just following what the hardware allows you to do. The absence of policy means that the driver allows you to configure the hardware in any way you might want to. Limiting rates, forbidding reparenting, that's policy, and it doesn't belong in a driver. You can argue that choosing not to reparent on rate change is a policy, and it is. That's why we need a way to enforce these policies outside the driver. >> The fact that I don't want the MMC parented to the PLLs, doesn't >> mean >> that it's an invalid configuration per se. > > Sure, and that's another policy :) A policy that is not enforced by the driver. Going back to the patch itself... I am fine with the change, although the patch description should probably be updated. We have .set_parent callbacks to configure clocks from DT, there's nothing more to it. Cheers, -Paul
Stephen Boyd <sboyd@kernel.org> writes: > Quoting Maxime Ripard (2022-11-09 03:00:45) >> On Mon, Nov 07, 2022 at 08:57:22PM +0000, Aidan MacDonald wrote: >> > >> > Maxime Ripard <maxime@cerno.tech> writes: >> > >> > > Hi, >> > > >> > > On Fri, Nov 04, 2022 at 05:35:29PM +0000, Aidan MacDonald wrote: >> > >> > Assigning the parent clock in the DT works once, at boot, but going off >> > what you wrote in the commit message, if the clock driver has a >> > .determine_rate() implementation that *can* reparent clocks then it >> > probably *will* reparent them, and the DT assignment will be lost. >> >> Yes, indeed, but assigned-clock-parents never provided any sort of >> guarantee on whether or not the clock was allowed to reparent or not. >> It's just a one-off thing, right before probe, and a clk_set_parent() >> call at probe will override that just fine. >> >> Just like assigned-clock-rates isn't permanent. >> >> > What I'm suggesting is a runtime constraint that the clock subsystem >> > would enforce, and actively prevent drivers from changing the parent. >> > Either explicitly with clk_set_parent() or due to .determine_rate(). >> > >> > That way you could write a .determine_rate() implementation that *can* >> > select a better parent, but if the DT applies a constraint to fix the >> > clock to a particular parent, the clock subsystem will force that parent >> > to be used so you can be sure the clock is never reparented by accident. >> >> Yeah, that sounds like a good idea, and CLK_SET_RATE_NO_REPARENT isn't >> too far off from this, it's just ignored by clk_set_parent() for now. I >> guess we could rename CLK_SET_RATE_NO_REPARENT to CLK_NO_REPARENT, make >> clk_set_parent handle it, and set that flag whenever >> assigned-clock-parents is set on a clock. >> >> It's out of scope for this series though, and I certainly don't want to >> deal with all the regressions it might create :) >> > > This sounds like a new dt binding that says the assigned parent should > never change. It sounds sort of like gpio hogs. A clock-hogs binding? Ideally we want the clock driver to be able to reparent clocks freely to get the best rate. But we also need some control over that to stop consumers from being reparented in undesired ways. Eg. you might want to make sure the GPU gets its own PLL so it can be reclocked easily, and putting another device on the GPU's PLL could prevent that. The only way to achieve this today is (1) never do any reparenting in the clock driver; and (2) use assigned-clock-parents in the DT to set up the entire clock tree manually. Maxime said that (2) is basically wrong -- if assigned-clock-parents provides no guarantee on what the OS does "after boot" then the OS is pretty much free to ignore it. My suggestion: add a per-clock bitmap to keep track of which parents are allowed. Any operation that would select a parent clock not on the whitelist should fail. Automatic reparenting should only select from clocks on the whitelist. And we need new DT bindings for controlling the whitelist, for example: clock-parents-0 = <&clk1>, <&pll_c>; clock-parents-1 = <&clk2>, <&pll_a>, <&pll_b>; This means that clk1 can only have pll_c as a parent, while clk2 can have pll_a or pll_b as parents. By default every clock will be able to use any parent, so a list is only needed if the machine needs a more restrictive policy. assigned-clock-parents should disable automatic reparenting, but allow explicit clk_set_parent(). This will allow clock drivers to start doing reparenting without breaking old DTs.
Hi, On Thu, Mar 23, 2023 at 03:35:30PM +0000, Aidan MacDonald wrote: > > Stephen Boyd <sboyd@kernel.org> writes: > > > Quoting Maxime Ripard (2022-11-09 03:00:45) > >> On Mon, Nov 07, 2022 at 08:57:22PM +0000, Aidan MacDonald wrote: > >> > > >> > Maxime Ripard <maxime@cerno.tech> writes: > >> > > >> > > Hi, > >> > > > >> > > On Fri, Nov 04, 2022 at 05:35:29PM +0000, Aidan MacDonald wrote: > >> > > >> > Assigning the parent clock in the DT works once, at boot, but going off > >> > what you wrote in the commit message, if the clock driver has a > >> > .determine_rate() implementation that *can* reparent clocks then it > >> > probably *will* reparent them, and the DT assignment will be lost. > >> > >> Yes, indeed, but assigned-clock-parents never provided any sort of > >> guarantee on whether or not the clock was allowed to reparent or not. > >> It's just a one-off thing, right before probe, and a clk_set_parent() > >> call at probe will override that just fine. > >> > >> Just like assigned-clock-rates isn't permanent. > >> > >> > What I'm suggesting is a runtime constraint that the clock subsystem > >> > would enforce, and actively prevent drivers from changing the parent. > >> > Either explicitly with clk_set_parent() or due to .determine_rate(). > >> > > >> > That way you could write a .determine_rate() implementation that *can* > >> > select a better parent, but if the DT applies a constraint to fix the > >> > clock to a particular parent, the clock subsystem will force that parent > >> > to be used so you can be sure the clock is never reparented by accident. > >> > >> Yeah, that sounds like a good idea, and CLK_SET_RATE_NO_REPARENT isn't > >> too far off from this, it's just ignored by clk_set_parent() for now. I > >> guess we could rename CLK_SET_RATE_NO_REPARENT to CLK_NO_REPARENT, make > >> clk_set_parent handle it, and set that flag whenever > >> assigned-clock-parents is set on a clock. > >> > >> It's out of scope for this series though, and I certainly don't want to > >> deal with all the regressions it might create :) > >> > > > > This sounds like a new dt binding that says the assigned parent should > > never change. It sounds sort of like gpio hogs. A clock-hogs binding? > > Ideally we want the clock driver to be able to reparent clocks freely > to get the best rate. But we also need some control over that to stop > consumers from being reparented in undesired ways. Eg. you might want > to make sure the GPU gets its own PLL so it can be reclocked easily, > and putting another device on the GPU's PLL could prevent that. > > The only way to achieve this today is (1) never do any reparenting in > the clock driver; and (2) use assigned-clock-parents in the DT to set > up the entire clock tree manually. > > Maxime said that (2) is basically wrong -- if assigned-clock-parents > provides no guarantee on what the OS does "after boot" then the OS is > pretty much free to ignore it. I didn't really say it's wrong, just that it never provided the guarantee you expect it to provide. I can't really say whether it's an issue or not on your platform. It's mostly unrelated to this series though, none of these patches affect that behavior in one way or the other. > My suggestion: add a per-clock bitmap to keep track of which parents > are allowed. Any operation that would select a parent clock not on the > whitelist should fail. Automatic reparenting should only select from > clocks on the whitelist. And we need new DT bindings for controlling > the whitelist, for example: > > clock-parents-0 = <&clk1>, <&pll_c>; > clock-parents-1 = <&clk2>, <&pll_a>, <&pll_b>; > > This means that clk1 can only have pll_c as a parent, while clk2 can > have pll_a or pll_b as parents. By default every clock will be able > to use any parent, so a list is only needed if the machine needs a > more restrictive policy. > > assigned-clock-parents should disable automatic reparenting, but allow > explicit clk_set_parent(). This will allow clock drivers to start doing > reparenting without breaking old DTs. I'm generally not a fan of putting all these policies in the device tree. Do you have an example where it wouldn't be possible to do exactly this from the driver itself? Maxime
Maxime Ripard <maxime@cerno.tech> writes: > On Thu, Mar 23, 2023 at 03:35:30PM +0000, Aidan MacDonald wrote: >> >> Stephen Boyd <sboyd@kernel.org> writes: >> >> > Quoting Maxime Ripard (2022-11-09 03:00:45) >> >> On Mon, Nov 07, 2022 at 08:57:22PM +0000, Aidan MacDonald wrote: >> >> > >> >> > Maxime Ripard <maxime@cerno.tech> writes: >> >> > >> >> > > Hi, >> >> > > >> >> > > On Fri, Nov 04, 2022 at 05:35:29PM +0000, Aidan MacDonald wrote: >> >> > >> >> > Assigning the parent clock in the DT works once, at boot, but going off >> >> > what you wrote in the commit message, if the clock driver has a >> >> > .determine_rate() implementation that *can* reparent clocks then it >> >> > probably *will* reparent them, and the DT assignment will be lost. >> >> >> >> Yes, indeed, but assigned-clock-parents never provided any sort of >> >> guarantee on whether or not the clock was allowed to reparent or not. >> >> It's just a one-off thing, right before probe, and a clk_set_parent() >> >> call at probe will override that just fine. >> >> >> >> Just like assigned-clock-rates isn't permanent. >> >> >> >> > What I'm suggesting is a runtime constraint that the clock subsystem >> >> > would enforce, and actively prevent drivers from changing the parent. >> >> > Either explicitly with clk_set_parent() or due to .determine_rate(). >> >> > >> >> > That way you could write a .determine_rate() implementation that *can* >> >> > select a better parent, but if the DT applies a constraint to fix the >> >> > clock to a particular parent, the clock subsystem will force that parent >> >> > to be used so you can be sure the clock is never reparented by accident. >> >> >> >> Yeah, that sounds like a good idea, and CLK_SET_RATE_NO_REPARENT isn't >> >> too far off from this, it's just ignored by clk_set_parent() for now. I >> >> guess we could rename CLK_SET_RATE_NO_REPARENT to CLK_NO_REPARENT, make >> >> clk_set_parent handle it, and set that flag whenever >> >> assigned-clock-parents is set on a clock. >> >> >> >> It's out of scope for this series though, and I certainly don't want to >> >> deal with all the regressions it might create :) >> >> >> > >> > This sounds like a new dt binding that says the assigned parent should >> > never change. It sounds sort of like gpio hogs. A clock-hogs binding? >> >> Ideally we want the clock driver to be able to reparent clocks freely >> to get the best rate. But we also need some control over that to stop >> consumers from being reparented in undesired ways. Eg. you might want >> to make sure the GPU gets its own PLL so it can be reclocked easily, >> and putting another device on the GPU's PLL could prevent that. >> >> The only way to achieve this today is (1) never do any reparenting in >> the clock driver; and (2) use assigned-clock-parents in the DT to set >> up the entire clock tree manually. >> >> Maxime said that (2) is basically wrong -- if assigned-clock-parents >> provides no guarantee on what the OS does "after boot" then the OS is >> pretty much free to ignore it. > > I didn't really say it's wrong, just that it never provided the > guarantee you expect it to provide. I can't really say whether it's an > issue or not on your platform. > > It's mostly unrelated to this series though, none of these patches > affect that behavior in one way or the other. I know. Sorry for derailing your patch :( >> My suggestion: add a per-clock bitmap to keep track of which parents >> are allowed. Any operation that would select a parent clock not on the >> whitelist should fail. Automatic reparenting should only select from >> clocks on the whitelist. And we need new DT bindings for controlling >> the whitelist, for example: >> >> clock-parents-0 = <&clk1>, <&pll_c>; >> clock-parents-1 = <&clk2>, <&pll_a>, <&pll_b>; >> >> This means that clk1 can only have pll_c as a parent, while clk2 can >> have pll_a or pll_b as parents. By default every clock will be able >> to use any parent, so a list is only needed if the machine needs a >> more restrictive policy. >> >> assigned-clock-parents should disable automatic reparenting, but allow >> explicit clk_set_parent(). This will allow clock drivers to start doing >> reparenting without breaking old DTs. > > I'm generally not a fan of putting all these policies in the device > tree. Do you have an example where it wouldn't be possible to do exactly > this from the driver itself? > > Maxime I'm confused. What's implicit in the example is clk1 and clk2 might have *other* possible choices of parent clock and the device tree is limiting what the OS is allowed to choose. Why would you put such arbitrary limitations into the driver? They would be different from machine to machine, unless the clock tree is so simple there is only *one* meaningful way to configure it. Most SoCs are complicated enough that there will be tradeoffs depending on what peripherals you are using (typically a single machine will not use *every* peripheral device provided by the SoC).
On Fri, Mar 24, 2023 at 08:58:48PM +0000, Aidan MacDonald wrote: > >> My suggestion: add a per-clock bitmap to keep track of which parents > >> are allowed. Any operation that would select a parent clock not on the > >> whitelist should fail. Automatic reparenting should only select from > >> clocks on the whitelist. And we need new DT bindings for controlling > >> the whitelist, for example: > >> > >> clock-parents-0 = <&clk1>, <&pll_c>; > >> clock-parents-1 = <&clk2>, <&pll_a>, <&pll_b>; > >> > >> This means that clk1 can only have pll_c as a parent, while clk2 can > >> have pll_a or pll_b as parents. By default every clock will be able > >> to use any parent, so a list is only needed if the machine needs a > >> more restrictive policy. > >> > >> assigned-clock-parents should disable automatic reparenting, but allow > >> explicit clk_set_parent(). This will allow clock drivers to start doing > >> reparenting without breaking old DTs. > > > > I'm generally not a fan of putting all these policies in the device > > tree. Do you have an example where it wouldn't be possible to do exactly > > this from the driver itself? > > I'm confused. What's implicit in the example is clk1 and clk2 might > have *other* possible choices of parent clock and the device tree is > limiting what the OS is allowed to choose. > > Why would you put such arbitrary limitations into the driver? Why would we put such arbitrary limitations in the firmware? As this entire thread can attest, people are already using the device tree to work around the limitations of the Linux driver, or reduce the features of Linux because they can rely on the device tree. Either way, it's linked to the state of the Linux driver, and any other OS or Linux version could very well implement something more dynamic. > They would be different from machine to machine, unless the clock > tree is so simple there is only *one* meaningful way to configure > it. If we look at the device trees we have in-tree, most of the users of assigned-clocks are the same from one board to another. > Most SoCs are complicated enough that there will be tradeoffs > depending on what peripherals you are using (typically a single > machine will not use *every* peripheral device provided by the SoC). We already have APIs to lock parents or rates on a given clock from the consumer. It's far superior (feature-wise) than what the device tree will ever offer because it's code, and it depends on the usage already since an unused driver won't probe. Maxime
Hi Maxime, Le lundi 27 mars 2023 à 21:24 +0200, Maxime Ripard a écrit : > On Fri, Mar 24, 2023 at 08:58:48PM +0000, Aidan MacDonald wrote: > > > > My suggestion: add a per-clock bitmap to keep track of which > > > > parents > > > > are allowed. Any operation that would select a parent clock not > > > > on the > > > > whitelist should fail. Automatic reparenting should only select > > > > from > > > > clocks on the whitelist. And we need new DT bindings for > > > > controlling > > > > the whitelist, for example: > > > > > > > > clock-parents-0 = <&clk1>, <&pll_c>; > > > > clock-parents-1 = <&clk2>, <&pll_a>, <&pll_b>; > > > > > > > > This means that clk1 can only have pll_c as a parent, while > > > > clk2 can > > > > have pll_a or pll_b as parents. By default every clock will be > > > > able > > > > to use any parent, so a list is only needed if the machine > > > > needs a > > > > more restrictive policy. > > > > > > > > assigned-clock-parents should disable automatic reparenting, > > > > but allow > > > > explicit clk_set_parent(). This will allow clock drivers to > > > > start doing > > > > reparenting without breaking old DTs. > > > > > > I'm generally not a fan of putting all these policies in the > > > device > > > tree. Do you have an example where it wouldn't be possible to do > > > exactly > > > this from the driver itself? > > > > I'm confused. What's implicit in the example is clk1 and clk2 might > > have *other* possible choices of parent clock and the device tree > > is > > limiting what the OS is allowed to choose. > > > > Why would you put such arbitrary limitations into the driver? > > Why would we put such arbitrary limitations in the firmware? As this > entire thread can attest, people are already using the device tree to > work around the limitations of the Linux driver, or reduce the > features of Linux because they can rely on the device tree. Either > way, it's linked to the state of the Linux driver, and any other OS > or > Linux version could very well implement something more dynamic. Probably because if we have to choose between setting policy in the kernel or in the firmware, it is arguably better to set it in the firmware. Especially when talking about clocks, as the firmware is already the one programming the boot clocks. Cheers, -Paul > > They would be different from machine to machine, unless the clock > > tree is so simple there is only *one* meaningful way to configure > > it. > > If we look at the device trees we have in-tree, most of the users of > assigned-clocks are the same from one board to another. > > > Most SoCs are complicated enough that there will be tradeoffs > > depending on what peripherals you are using (typically a single > > machine will not use *every* peripheral device provided by the > > SoC). > > We already have APIs to lock parents or rates on a given clock from > the consumer. It's far superior (feature-wise) than what the device > tree will ever offer because it's code, and it depends on the usage > already since an unused driver won't probe. > > Maxime
On Wed, Apr 05, 2023 at 02:57:26PM +0200, Paul Cercueil wrote: > Le lundi 27 mars 2023 à 21:24 +0200, Maxime Ripard a écrit : > > On Fri, Mar 24, 2023 at 08:58:48PM +0000, Aidan MacDonald wrote: > > > > > My suggestion: add a per-clock bitmap to keep track of which > > > > > parents > > > > > are allowed. Any operation that would select a parent clock not > > > > > on the > > > > > whitelist should fail. Automatic reparenting should only select > > > > > from > > > > > clocks on the whitelist. And we need new DT bindings for > > > > > controlling > > > > > the whitelist, for example: > > > > > > > > > > clock-parents-0 = <&clk1>, <&pll_c>; > > > > > clock-parents-1 = <&clk2>, <&pll_a>, <&pll_b>; > > > > > > > > > > This means that clk1 can only have pll_c as a parent, while > > > > > clk2 can > > > > > have pll_a or pll_b as parents. By default every clock will be > > > > > able > > > > > to use any parent, so a list is only needed if the machine > > > > > needs a > > > > > more restrictive policy. > > > > > > > > > > assigned-clock-parents should disable automatic reparenting, > > > > > but allow > > > > > explicit clk_set_parent(). This will allow clock drivers to > > > > > start doing > > > > > reparenting without breaking old DTs. > > > > > > > > I'm generally not a fan of putting all these policies in the > > > > device > > > > tree. Do you have an example where it wouldn't be possible to do > > > > exactly > > > > this from the driver itself? > > > > > > I'm confused. What's implicit in the example is clk1 and clk2 might > > > have *other* possible choices of parent clock and the device tree > > > is > > > limiting what the OS is allowed to choose. > > > > > > Why would you put such arbitrary limitations into the driver? > > > > Why would we put such arbitrary limitations in the firmware? As this > > entire thread can attest, people are already using the device tree to > > work around the limitations of the Linux driver, or reduce the > > features of Linux because they can rely on the device tree. Either > > way, it's linked to the state of the Linux driver, and any other OS > > or > > Linux version could very well implement something more dynamic. > > Probably because if we have to choose between setting policy in the > kernel or in the firmware, it is arguably better to set it in the > firmware. I have a very different view on this I guess. Firmware is (most of the time) hard to update, and the policy depend on the state of support of a given OS so it's likely to evolve. The kernel is the best place to me to put that kind of policy. Why do you think differently? > Especially when talking about clocks, as the firmware is already the > one programming the boot clocks. I'm not sure what your point is there. I don't think I ever saw a firmware getting the clocks right for every possible scenario on a given platform. And if it was indeed the case, then we wouldn't even a kernel driver. Maxime
Le mercredi 05 avril 2023 à 16:50 +0200, Maxime Ripard a écrit : > On Wed, Apr 05, 2023 at 02:57:26PM +0200, Paul Cercueil wrote: > > Le lundi 27 mars 2023 à 21:24 +0200, Maxime Ripard a écrit : > > > On Fri, Mar 24, 2023 at 08:58:48PM +0000, Aidan MacDonald wrote: > > > > > > My suggestion: add a per-clock bitmap to keep track of > > > > > > which > > > > > > parents > > > > > > are allowed. Any operation that would select a parent clock > > > > > > not > > > > > > on the > > > > > > whitelist should fail. Automatic reparenting should only > > > > > > select > > > > > > from > > > > > > clocks on the whitelist. And we need new DT bindings for > > > > > > controlling > > > > > > the whitelist, for example: > > > > > > > > > > > > clock-parents-0 = <&clk1>, <&pll_c>; > > > > > > clock-parents-1 = <&clk2>, <&pll_a>, <&pll_b>; > > > > > > > > > > > > This means that clk1 can only have pll_c as a parent, while > > > > > > clk2 can > > > > > > have pll_a or pll_b as parents. By default every clock will > > > > > > be > > > > > > able > > > > > > to use any parent, so a list is only needed if the machine > > > > > > needs a > > > > > > more restrictive policy. > > > > > > > > > > > > assigned-clock-parents should disable automatic > > > > > > reparenting, > > > > > > but allow > > > > > > explicit clk_set_parent(). This will allow clock drivers to > > > > > > start doing > > > > > > reparenting without breaking old DTs. > > > > > > > > > > I'm generally not a fan of putting all these policies in the > > > > > device > > > > > tree. Do you have an example where it wouldn't be possible to > > > > > do > > > > > exactly > > > > > this from the driver itself? > > > > > > > > I'm confused. What's implicit in the example is clk1 and clk2 > > > > might > > > > have *other* possible choices of parent clock and the device > > > > tree > > > > is > > > > limiting what the OS is allowed to choose. > > > > > > > > Why would you put such arbitrary limitations into the driver? > > > > > > Why would we put such arbitrary limitations in the firmware? As > > > this > > > entire thread can attest, people are already using the device > > > tree to > > > work around the limitations of the Linux driver, or reduce the > > > features of Linux because they can rely on the device tree. > > > Either > > > way, it's linked to the state of the Linux driver, and any other > > > OS > > > or > > > Linux version could very well implement something more dynamic. > > > > Probably because if we have to choose between setting policy in the > > kernel or in the firmware, it is arguably better to set it in the > > firmware. > > I have a very different view on this I guess. Firmware is (most of > the > time) hard to update, and the policy depend on the state of support > of a > given OS so it's likely to evolve. The kernel is the best place to me > to > put that kind of policy. Why do you think differently? Because the clocks configuration can be board-specific. And you don't really want board-specific stuff in the driver. If we take the Ingenic JZ4770 SoC as example, on one board we parent everything we can to the PLL1 clock and set it to 432 MHz (the least common multiple). Then the PLL0 (which drives the DDR and CPU clocks) can be updated to overclock/underclock the CPU and RAM. So should that be hardcoded in the driver? Well, for a different board, for which overclock is not really needed, it's better to parent everything to PLL0 so that PLL1 can be shut down to save power. So what policy should be hardcoded in the driver? > > > Especially when talking about clocks, as the firmware is already > > the > > one programming the boot clocks. > > I'm not sure what your point is there. I don't think I ever saw a > firmware getting the clocks right for every possible scenario on a > given > platform. And if it was indeed the case, then we wouldn't even a > kernel > driver. My point is that there is already policy in how the firmware sets up the hardware; and most often than not, the kernel driver won't change that (e.g. you're probably not going to touch the DDR clock). It's better to have all policy in the firmware then, instead of having some in the firmware, and some in the kernel driver. Cheers, -Paul
diff --git a/drivers/clk/ingenic/cgu.c b/drivers/clk/ingenic/cgu.c index 1f7ba30f5a1b..0c9c8344ad11 100644 --- a/drivers/clk/ingenic/cgu.c +++ b/drivers/clk/ingenic/cgu.c @@ -491,22 +491,23 @@ ingenic_clk_calc_div(struct clk_hw *hw, return div; } -static long -ingenic_clk_round_rate(struct clk_hw *hw, unsigned long req_rate, - unsigned long *parent_rate) +static int ingenic_clk_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct ingenic_clk *ingenic_clk = to_ingenic_clk(hw); const struct ingenic_cgu_clk_info *clk_info = to_clk_info(ingenic_clk); unsigned int div = 1; if (clk_info->type & CGU_CLK_DIV) - div = ingenic_clk_calc_div(hw, clk_info, *parent_rate, req_rate); + div = ingenic_clk_calc_div(hw, clk_info, req->best_parent_rate, + req->rate); else if (clk_info->type & CGU_CLK_FIXDIV) div = clk_info->fixdiv.div; else if (clk_hw_can_set_rate_parent(hw)) - *parent_rate = req_rate; + req->best_parent_rate = req->rate; - return DIV_ROUND_UP(*parent_rate, div); + req->rate = DIV_ROUND_UP(req->best_parent_rate, div); + return 0; } static inline int ingenic_clk_check_stable(struct ingenic_cgu *cgu, @@ -626,7 +627,7 @@ static const struct clk_ops ingenic_clk_ops = { .set_parent = ingenic_clk_set_parent, .recalc_rate = ingenic_clk_recalc_rate, - .round_rate = ingenic_clk_round_rate, + .determine_rate = ingenic_clk_determine_rate, .set_rate = ingenic_clk_set_rate, .enable = ingenic_clk_enable,
The Ingenic CGU clocks implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The driver does implement round_rate() though, which means that we can change the rate of the clock, but we will never get to change the parent. However, It's hard to tell whether it's been done on purpose or not. Since we'll start mandating a determine_rate() implementation, let's convert the round_rate() implementation to a determine_rate(), which will also make the current behavior explicit. And if it was an oversight, the clock behaviour can be adjusted later on. Signed-off-by: Maxime Ripard <maxime@cerno.tech> --- drivers/clk/ingenic/cgu.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-)