Message ID | 20221027191113.403712-4-sean.anderson@seco.com |
---|---|
State | Superseded |
Headers | show |
Series | phy: Add support for Lynx 10G SerDes | expand |
Quoting Sean Anderson (2022-10-27 12:11:07) > This adds ids for the Lynx 10g SerDes's internal PLLs. These may be used > with assigned-clock* to specify a particular frequency to use. For > example, to set the second PLL (at offset 0x20)'s frequency, use > LYNX10G_PLLa(1). These are for use only in the device tree, and are not > otherwise used by the driver. > > Signed-off-by: Sean Anderson <sean.anderson@seco.com> > Acked-by: Rob Herring <robh@kernel.org> > --- Acked-by: Stephen Boyd <sboyd@kernel.org>
On 10/27/22 17:49, Stephen Boyd wrote: > Quoting Sean Anderson (2022-10-27 12:11:07) >> This adds ids for the Lynx 10g SerDes's internal PLLs. These may be used >> with assigned-clock* to specify a particular frequency to use. For >> example, to set the second PLL (at offset 0x20)'s frequency, use >> LYNX10G_PLLa(1). These are for use only in the device tree, and are not >> otherwise used by the driver. >> >> Signed-off-by: Sean Anderson <sean.anderson@seco.com> >> Acked-by: Rob Herring <robh@kernel.org> >> --- > > Acked-by: Stephen Boyd <sboyd@kernel.org> Whoops, looks like I forgot to pick this up in v5. There's also an (internal) clock driver in the next patch if you want to look that over. --Sean
diff --git a/include/dt-bindings/clock/fsl,lynx-10g.h b/include/dt-bindings/clock/fsl,lynx-10g.h new file mode 100644 index 000000000000..15362ae85304 --- /dev/null +++ b/include/dt-bindings/clock/fsl,lynx-10g.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ +/* + * Copyright (C) 2022 Sean Anderson <sean.anderson@seco.com> + */ + +#ifndef __DT_BINDINGS_CLK_LYNX_10G_H +#define __DT_BINDINGS_CLK_LYNX_10G_H + +#define LYNX10G_CLKS_PER_PLL 2 + +#define LYNX10G_PLLa(a) ((a) * LYNX10G_CLKS_PER_PLL) +#define LYNX10G_PLLa_EX_DLY(a) ((a) * LYNX10G_CLKS_PER_PLL + 1) + +#endif /* __DT_BINDINGS_CLK_LYNX_10G_H */